[X86][SSE] combineBitcastvxi1 - add pre-AVX512 v64i1 handling

Author: RKSimon

llvm/lib/Target/X86/X86ISelLowering.cpp

@@ -36441,7 +36441,14 @@ static SDValue combineBitcastvxi1(SelectionDAG &DAG, EVT VT, SDValue Src,
   case MVT::v64i1:
     // If we have AVX512F, but not AVX512BW and the input is truncated from
     // v64i8 checked earlier. Then split the input and make two pmovmskbs.
-    if (Subtarget.hasAVX512() && !Subtarget.hasBWI()) {
+    if (Subtarget.hasAVX512()) {
+      if (Subtarget.hasBWI())
+        return SDValue();
+      SExtVT = MVT::v64i8;
+      break;
+    }
+    // Split if this is a <64 x i8> comparison result.
+    if (checkBitcastSrcVectorSize(Src, 512)) {
       SExtVT = MVT::v64i8;
       break;
     }

llvm/test/CodeGen/X86/bitcast-and-setcc-512.ll

@@ -534,28 +534,28 @@ define i16 @v16f32(<16 x float> %a, <16 x float> %b, <16 x float> %c, <16 x floa
 define i64 @v64i8(<64 x i8> %a, <64 x i8> %b, <64 x i8> %c, <64 x i8> %d) {
 ; SSE-LABEL: v64i8:
 ; SSE:       # %bb.0:
-; SSE-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm10
-; SSE-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm11
 ; SSE-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm8
 ; SSE-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm9
-; SSE-NEXT:    pcmpgtb %xmm7, %xmm3
-; SSE-NEXT:    pcmpgtb %xmm6, %xmm2
-; SSE-NEXT:    pcmpgtb %xmm5, %xmm1
+; SSE-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm10
+; SSE-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm11
 ; SSE-NEXT:    pcmpgtb %xmm4, %xmm0
-; SSE-NEXT:    pcmpgtb {{[0-9]+}}(%rsp), %xmm9
-; SSE-NEXT:    pand %xmm3, %xmm9
-; SSE-NEXT:    pcmpgtb {{[0-9]+}}(%rsp), %xmm8
-; SSE-NEXT:    pand %xmm2, %xmm8
+; SSE-NEXT:    pcmpgtb %xmm5, %xmm1
+; SSE-NEXT:    pcmpgtb %xmm6, %xmm2
+; SSE-NEXT:    pcmpgtb %xmm7, %xmm3
 ; SSE-NEXT:    pcmpgtb {{[0-9]+}}(%rsp), %xmm11
-; SSE-NEXT:    pand %xmm1, %xmm11
+; SSE-NEXT:    pand %xmm0, %xmm11
 ; SSE-NEXT:    pcmpgtb {{[0-9]+}}(%rsp), %xmm10
-; SSE-NEXT:    pand %xmm0, %xmm10
-; SSE-NEXT:    pmovmskb %xmm10, %eax
-; SSE-NEXT:    pmovmskb %xmm11, %ecx
+; SSE-NEXT:    pand %xmm1, %xmm10
+; SSE-NEXT:    pcmpgtb {{[0-9]+}}(%rsp), %xmm9
+; SSE-NEXT:    pand %xmm2, %xmm9
+; SSE-NEXT:    pcmpgtb {{[0-9]+}}(%rsp), %xmm8
+; SSE-NEXT:    pand %xmm3, %xmm8
+; SSE-NEXT:    pmovmskb %xmm11, %eax
+; SSE-NEXT:    pmovmskb %xmm10, %ecx
 ; SSE-NEXT:    shll $16, %ecx
 ; SSE-NEXT:    orl %eax, %ecx
-; SSE-NEXT:    pmovmskb %xmm8, %edx
-; SSE-NEXT:    pmovmskb %xmm9, %eax
+; SSE-NEXT:    pmovmskb %xmm9, %edx
+; SSE-NEXT:    pmovmskb %xmm8, %eax
 ; SSE-NEXT:    shll $16, %eax
 ; SSE-NEXT:    orl %edx, %eax
 ; SSE-NEXT:    shlq $32, %rax
@@ -599,12 +599,12 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8> %b, <64 x i8> %c, <64 x i8> %d) {
 ;
 ; AVX2-LABEL: v64i8:
 ; AVX2:       # %bb.0:
-; AVX2-NEXT:    vpcmpgtb %ymm3, %ymm1, %ymm1
 ; AVX2-NEXT:    vpcmpgtb %ymm2, %ymm0, %ymm0
-; AVX2-NEXT:    vpcmpgtb %ymm7, %ymm5, %ymm2
-; AVX2-NEXT:    vpand %ymm2, %ymm1, %ymm1
+; AVX2-NEXT:    vpcmpgtb %ymm3, %ymm1, %ymm1
 ; AVX2-NEXT:    vpcmpgtb %ymm6, %ymm4, %ymm2
 ; AVX2-NEXT:    vpand %ymm2, %ymm0, %ymm0
+; AVX2-NEXT:    vpcmpgtb %ymm7, %ymm5, %ymm2
+; AVX2-NEXT:    vpand %ymm2, %ymm1, %ymm1
 ; AVX2-NEXT:    vpmovmskb %ymm0, %ecx
 ; AVX2-NEXT:    vpmovmskb %ymm1, %eax
 ; AVX2-NEXT:    shlq $32, %rax