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KanRobertKanRobert
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Temporaily revert [X86][MC][NFC] Reduce the parameters of functions in X86MCCodeEmitter(Part II)
It causes some encoding fails. Plan to recommit it after fixing that. This reverts commit 3017580.
1 parent 3017580 commit c5fa0a4

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‎llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp

Lines changed: 43 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -76,12 +76,13 @@ class X86MCCodeEmitter : public MCCodeEmitter {
7676
unsigned &CurByte, raw_ostream &OS) const;
7777

7878
void emitMemModRMByte(const MCInst &MI, unsigned Op, unsigned RegOpcodeField,
79-
uint64_t TSFlags, bool HasREX, unsigned &CurByte,
79+
uint64_t TSFlags, bool Rex, unsigned &CurByte,
8080
raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups,
8181
const MCSubtargetInfo &STI) const;
8282

83-
bool emitPrefixImpl(unsigned &CurOp, unsigned &CurByte, const MCInst &MI,
84-
const MCSubtargetInfo &STI, raw_ostream &OS) const;
83+
void emitPrefixImpl(unsigned &CurOp, unsigned &CurByte, bool &Rex,
84+
const MCInst &MI, const MCSubtargetInfo &STI,
85+
raw_ostream &OS) const;
8586

8687
void emitVEXOpcodePrefix(unsigned &CurByte, int MemOperand, const MCInst &MI,
8788
raw_ostream &OS) const;
@@ -92,8 +93,7 @@ class X86MCCodeEmitter : public MCCodeEmitter {
9293
bool emitOpcodePrefix(unsigned &CurByte, int MemOperand, const MCInst &MI,
9394
const MCSubtargetInfo &STI, raw_ostream &OS) const;
9495

95-
bool emitREXPrefix(unsigned &CurByte, int MemOperand, const MCInst &MI,
96-
raw_ostream &OS) const;
96+
uint8_t determineREXPrefix(const MCInst &MI, int MemOperand) const;
9797
};
9898

9999
} // end anonymous namespace
@@ -384,7 +384,7 @@ void X86MCCodeEmitter::emitSIBByte(unsigned SS, unsigned Index, unsigned Base,
384384

385385
void X86MCCodeEmitter::emitMemModRMByte(const MCInst &MI, unsigned Op,
386386
unsigned RegOpcodeField,
387-
uint64_t TSFlags, bool HasREX,
387+
uint64_t TSFlags, bool Rex,
388388
unsigned &CurByte, raw_ostream &OS,
389389
SmallVectorImpl<MCFixup> &Fixups,
390390
const MCSubtargetInfo &STI) const {
@@ -412,7 +412,7 @@ void X86MCCodeEmitter::emitMemModRMByte(const MCInst &MI, unsigned Op,
412412
default:
413413
return X86::reloc_riprel_4byte;
414414
case X86::MOV64rm:
415-
assert(HasREX);
415+
assert(Rex);
416416
return X86::reloc_riprel_4byte_movq_load;
417417
case X86::CALL64m:
418418
case X86::JMP64m:
@@ -426,8 +426,8 @@ void X86MCCodeEmitter::emitMemModRMByte(const MCInst &MI, unsigned Op,
426426
case X86::SBB64rm:
427427
case X86::SUB64rm:
428428
case X86::XOR64rm:
429-
return HasREX ? X86::reloc_riprel_4byte_relax_rex
430-
: X86::reloc_riprel_4byte_relax;
429+
return Rex ? X86::reloc_riprel_4byte_relax_rex
430+
: X86::reloc_riprel_4byte_relax;
431431
}
432432
}();
433433

@@ -649,11 +649,8 @@ void X86MCCodeEmitter::emitMemModRMByte(const MCInst &MI, unsigned Op,
649649
CurByte, OS, Fixups);
650650
}
651651

652-
/// Emit all instruction prefixes.
653-
///
654-
/// \returns true if REX prefix is used, otherwise returns false.
655-
bool X86MCCodeEmitter::emitPrefixImpl(unsigned &CurOp, unsigned &CurByte,
656-
const MCInst &MI,
652+
void X86MCCodeEmitter::emitPrefixImpl(unsigned &CurOp, unsigned &CurByte,
653+
bool &Rex, const MCInst &MI,
657654
const MCSubtargetInfo &STI,
658655
raw_ostream &OS) const {
659656
uint64_t TSFlags = MCII.get(MI.getOpcode()).TSFlags;
@@ -699,11 +696,10 @@ bool X86MCCodeEmitter::emitPrefixImpl(unsigned &CurOp, unsigned &CurByte,
699696

700697
// Encoding type for this instruction.
701698
uint64_t Encoding = TSFlags & X86II::EncodingMask;
702-
bool HasREX = false;
703-
if (Encoding)
704-
emitVEXOpcodePrefix(CurByte, MemoryOperand, MI, OS);
699+
if (Encoding == 0)
700+
Rex = emitOpcodePrefix(CurByte, MemoryOperand, MI, STI, OS);
705701
else
706-
HasREX = emitOpcodePrefix(CurByte, MemoryOperand, MI, STI, OS);
702+
emitVEXOpcodePrefix(CurByte, MemoryOperand, MI, OS);
707703

708704
uint64_t Form = TSFlags & X86II::FormMask;
709705
switch (Form) {
@@ -752,8 +748,6 @@ bool X86MCCodeEmitter::emitPrefixImpl(unsigned &CurOp, unsigned &CurByte,
752748
break;
753749
}
754750
}
755-
756-
return HasREX;
757751
}
758752

759753
/// AVX instructions are encoded using a opcode prefix called VEX.
@@ -1187,14 +1181,11 @@ void X86MCCodeEmitter::emitVEXOpcodePrefix(unsigned &CurByte, int MemOperand,
11871181
}
11881182
}
11891183

1190-
/// Emit REX prefix which specifies
1191-
/// 1) 64-bit instructions,
1192-
/// 2) non-default operand size, and
1193-
/// 3) use of X86-64 extended registers.
1194-
///
1195-
/// \returns true if REX prefix is used, otherwise returns false.
1196-
bool X86MCCodeEmitter::emitREXPrefix(unsigned &CurByte, int MemOperand,
1197-
const MCInst &MI, raw_ostream &OS) const {
1184+
/// Determine if the MCInst has to be encoded with a X86-64 REX prefix which
1185+
/// specifies 1) 64-bit instructions, 2) non-default operand size, and 3) use
1186+
/// of X86-64 extended registers.
1187+
uint8_t X86MCCodeEmitter::determineREXPrefix(const MCInst &MI,
1188+
int MemOperand) const {
11981189
uint8_t REX = 0;
11991190
bool UsesHighByteReg = false;
12001191

@@ -1280,10 +1271,7 @@ bool X86MCCodeEmitter::emitREXPrefix(unsigned &CurByte, int MemOperand,
12801271
report_fatal_error(
12811272
"Cannot encode high byte register in REX-prefixed instruction");
12821273

1283-
if (REX)
1284-
emitByte(0x40 | REX, CurByte, OS);
1285-
1286-
return REX != 0;
1274+
return REX;
12871275
}
12881276

12891277
/// Emit segment override opcode prefix as needed.
@@ -1301,14 +1289,15 @@ void X86MCCodeEmitter::emitSegmentOverridePrefix(unsigned &CurByte,
13011289
/// \param MemOperand the operand # of the start of a memory operand if present.
13021290
/// If not present, it is -1.
13031291
///
1304-
/// \returns true if REX prefix is used, otherwise returns false.
1292+
/// \returns true if a REX prefix was used.
13051293
bool X86MCCodeEmitter::emitOpcodePrefix(unsigned &CurByte, int MemOperand,
13061294
const MCInst &MI,
13071295
const MCSubtargetInfo &STI,
13081296
raw_ostream &OS) const {
13091297
const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
13101298
uint64_t TSFlags = Desc.TSFlags;
13111299

1300+
bool Ret = false;
13121301
// Emit the operand size opcode prefix as needed.
13131302
if ((TSFlags & X86II::OpSizeMask) ==
13141303
(STI.hasFeature(X86::Mode16Bit) ? X86II::OpSize32 : X86II::OpSize16))
@@ -1335,11 +1324,15 @@ bool X86MCCodeEmitter::emitOpcodePrefix(unsigned &CurByte, int MemOperand,
13351324
}
13361325

13371326
// Handle REX prefix.
1338-
assert((STI.hasFeature(X86::Mode64Bit) || !(TSFlags & X86II::REX_W)) &&
1339-
"REX.W requires 64bit mode.");
1340-
bool HasREX = STI.hasFeature(X86::Mode64Bit)
1341-
? emitREXPrefix(CurByte, MemOperand, MI, OS)
1342-
: false;
1327+
// FIXME: Can this come before F2 etc to simplify emission?
1328+
if (STI.hasFeature(X86::Mode64Bit)) {
1329+
if (uint8_t REX = determineREXPrefix(MI, MemOperand)) {
1330+
emitByte(0x40 | REX, CurByte, OS);
1331+
Ret = true;
1332+
}
1333+
} else {
1334+
assert(!(TSFlags & X86II::REX_W) && "REX.W requires 64bit mode.");
1335+
}
13431336

13441337
// 0x0F escape code must be emitted just before the opcode.
13451338
switch (TSFlags & X86II::OpMapMask) {
@@ -1359,8 +1352,7 @@ bool X86MCCodeEmitter::emitOpcodePrefix(unsigned &CurByte, int MemOperand,
13591352
emitByte(0x3A, CurByte, OS);
13601353
break;
13611354
}
1362-
1363-
return HasREX;
1355+
return Ret;
13641356
}
13651357

13661358
void X86MCCodeEmitter::emitPrefix(const MCInst &MI, raw_ostream &OS,
@@ -1378,7 +1370,8 @@ void X86MCCodeEmitter::emitPrefix(const MCInst &MI, raw_ostream &OS,
13781370
// Keep track of the current byte being emitted.
13791371
unsigned CurByte = 0;
13801372

1381-
emitPrefixImpl(CurOp, CurByte, MI, STI, OS);
1373+
bool Rex = false;
1374+
emitPrefixImpl(CurOp, CurByte, Rex, MI, STI, OS);
13821375
}
13831376

13841377
void X86MCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
@@ -1398,7 +1391,8 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
13981391
// Keep track of the current byte being emitted.
13991392
unsigned CurByte = 0;
14001393

1401-
bool HasREX = emitPrefixImpl(CurOp, CurByte, MI, STI, OS);
1394+
bool Rex = false;
1395+
emitPrefixImpl(CurOp, CurByte, Rex, MI, STI, OS);
14021396

14031397
// It uses the VEX.VVVV field?
14041398
bool HasVEX_4V = TSFlags & X86II::VEX_4V;
@@ -1503,7 +1497,7 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
15031497
++SrcRegNum;
15041498

15051499
emitMemModRMByte(MI, CurOp, getX86RegNum(MI.getOperand(SrcRegNum)), TSFlags,
1506-
HasREX, CurByte, OS, Fixups, STI);
1500+
Rex, CurByte, OS, Fixups, STI);
15071501
CurOp = SrcRegNum + 1;
15081502
break;
15091503
}
@@ -1576,7 +1570,7 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
15761570
emitByte(BaseOpcode, CurByte, OS);
15771571

15781572
emitMemModRMByte(MI, FirstMemOp, getX86RegNum(MI.getOperand(CurOp)),
1579-
TSFlags, HasREX, CurByte, OS, Fixups, STI);
1573+
TSFlags, Rex, CurByte, OS, Fixups, STI);
15801574
CurOp = FirstMemOp + X86::AddrNumOperands;
15811575
if (HasVEX_I8Reg)
15821576
I8RegNum = getX86RegEncoding(MI, CurOp++);
@@ -1588,7 +1582,7 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
15881582
emitByte(BaseOpcode, CurByte, OS);
15891583

15901584
emitMemModRMByte(MI, FirstMemOp, getX86RegNum(MI.getOperand(CurOp)),
1591-
TSFlags, HasREX, CurByte, OS, Fixups, STI);
1585+
TSFlags, Rex, CurByte, OS, Fixups, STI);
15921586
CurOp = FirstMemOp + X86::AddrNumOperands;
15931587
++CurOp; // Encoded in VEX.VVVV.
15941588
break;
@@ -1605,7 +1599,7 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
16051599
emitByte(BaseOpcode, CurByte, OS);
16061600

16071601
emitMemModRMByte(MI, FirstMemOp, getX86RegNum(MI.getOperand(CurOp)),
1608-
TSFlags, HasREX, CurByte, OS, Fixups, STI);
1602+
TSFlags, Rex, CurByte, OS, Fixups, STI);
16091603
CurOp = FirstMemOp + X86::AddrNumOperands;
16101604
break;
16111605
}
@@ -1618,7 +1612,7 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
16181612
emitByte(BaseOpcode + CC, CurByte, OS);
16191613

16201614
emitMemModRMByte(MI, FirstMemOp, getX86RegNum(MI.getOperand(RegOp)),
1621-
TSFlags, HasREX, CurByte, OS, Fixups, STI);
1615+
TSFlags, Rex, CurByte, OS, Fixups, STI);
16221616
break;
16231617
}
16241618

@@ -1657,8 +1651,7 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
16571651
unsigned CC = MI.getOperand(CurOp++).getImm();
16581652
emitByte(BaseOpcode + CC, CurByte, OS);
16591653

1660-
emitMemModRMByte(MI, FirstMemOp, 0, TSFlags, HasREX, CurByte, OS, Fixups,
1661-
STI);
1654+
emitMemModRMByte(MI, FirstMemOp, 0, TSFlags, Rex, CurByte, OS, Fixups, STI);
16621655
break;
16631656
}
16641657

@@ -1678,7 +1671,7 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
16781671
emitByte(BaseOpcode, CurByte, OS);
16791672
emitMemModRMByte(MI, CurOp,
16801673
(Form == X86II::MRMXm) ? 0 : Form - X86II::MRM0m, TSFlags,
1681-
HasREX, CurByte, OS, Fixups, STI);
1674+
Rex, CurByte, OS, Fixups, STI);
16821675
CurOp += X86::AddrNumOperands;
16831676
break;
16841677

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