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x86_64: switch to the limine boot protocol
* The stivale2 protocol is deperacated so, now we are using the new next-gen limine protocol. :) Signed-off-by: Andy-Python-Programmer <[email protected]>
1 parent 490036c commit d6e2567

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18 files changed

+221
-339
lines changed

18 files changed

+221
-339
lines changed

.vscode/launch.json

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@
99
"platform select remote-gdb-server"
1010
],
1111
"targetCreateCommands": [
12-
"target create ${workspaceFolder}/src/target/x86_64-aero_os/release/aero_kernel"
12+
"target create ${workspaceFolder}/build/iso_root/aero.elf"
1313
],
1414
"processCreateCommands": [
1515
"gdb-remote 127.0.0.1:1234" // Connect to the GDB Server

aero.py

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -59,15 +59,16 @@
5959
VERBOSE=yes
6060
6161
:aero
62-
PROTOCOL=stivale2
62+
PROTOCOL=limine
63+
KASLR=no
6364
KERNEL_PATH=boot:///aero.elf
6465
CMDLINE=term-background=background theme-background=0x50000000
6566
6667
MODULE_PATH=boot:///term_background.bmp
67-
MODULE_STRING=background
68+
MODULE_CMDLINE=background
6869
6970
MODULE_PATH=boot:///initramfs.cpio
70-
MODULE_STRING=initramfs
71+
MODULE_CMDLINE=initramfs
7172
"""
7273

7374

src/.cargo/kernel.ld

Lines changed: 32 additions & 58 deletions
Original file line numberDiff line numberDiff line change
@@ -1,80 +1,54 @@
1-
ENTRY(x86_64_aero_main)
2-
OUTPUT_FORMAT(elf64-x86-64)
1+
/* Tell the linker that we want an x86_64 ELF64 output file */
2+
OUTPUT_FORMAT(elf64-x86-64)
3+
OUTPUT_ARCH(i386:x86-64)
34

4-
/* We want to be placed in the higher half, 2MiB above 0x00 in physical memory */
5-
KERNEL_OFFSET = 0xFFFFFFFF80200000;
5+
/* We want the symbol `x86_64_aero_main` to be our entry point */
6+
ENTRY(x86_64_aero_main)
67

7-
SECTIONS
8+
/* Define the program headers we want so the bootloader gives us the right */
9+
/* MMU permissions */
10+
PHDRS
811
{
9-
. = KERNEL_OFFSET;
10-
11-
__kernel_start = .;
12+
null PT_NULL FLAGS(0) ; /* Null segment */
13+
text PT_LOAD FLAGS((1 << 0) | (1 << 2)) ; /* Execute + Read */
14+
rodata PT_LOAD FLAGS((1 << 2)) ; /* Read only */
15+
data PT_LOAD FLAGS((1 << 1) | (1 << 2)) ; /* Write + Read */
16+
}
1217

13-
.stivale2hdr : ALIGN(4K) {
14-
KEEP(*(.stivale2hdr))
15-
}
18+
SECTIONS
19+
{
20+
/* We wanna be placed in the topmost 2GiB of the address space, for optimisations */
21+
/* and because that is what the Limine spec mandates. */
22+
/* Any address in this region will do, but often 0xffffffff80000000 is chosen as */
23+
/* that is the beginning of the region. */
24+
. = 0xffffffff80000000;
1625

17-
/* Then place all of the other traditional executable sections afterwards... */
18-
. = ALIGN(4K);
1926
.text : {
20-
__text_start = .;
2127
*(.text .text.*)
22-
. = ALIGN(4096);
23-
__text_end = .;
24-
}
28+
} :text
29+
30+
/* Move to the next memory page for .rodata */
31+
. += CONSTANT(MAXPAGESIZE);
2532

26-
. = ALIGN(4K);
2733
.rodata : {
28-
__rodata_start = .;
29-
*(.rodata*)
30-
. = ALIGN(4096);
31-
__rodata_end = .;
32-
}
34+
*(.rodata .rodata.*)
35+
} :rodata
3336

34-
/* The kernel makes use of the tdata section for CPU-local variables... */
35-
. = ALIGN(4K);
36-
.tdata : {
37-
__tdata_start = .;
38-
KEEP(*(.tdata*))
39-
KEEP(*(.tbss*))
40-
__tdata_end = ALIGN(8);
41-
}
37+
/* Move to the next memory page for .data */
38+
. += CONSTANT(MAXPAGESIZE);
4239

43-
. = ALIGN(4K);
4440
.data : {
45-
__data_start = .;
4641
*(.data .data.*)
47-
. = ALIGN(4096);
48-
__data_end = .;
49-
}
42+
} :data
5043

51-
. = ALIGN(4K);
5244
.kernel_modules : {
5345
__kernel_modules_start = .;
5446
KEEP(*(.kernel_modules.init))
5547
__kernel_modules_end = .;
5648
}
5749

58-
. = ALIGN(4K);
5950
.bss : {
60-
__bss_start = .;
51+
*(COMMON)
6152
*(.bss .bss.*)
62-
. = ALIGN(4096);
63-
__bss_end = .;
64-
}
65-
66-
__kernel_end = .;
67-
68-
/*
69-
* Discard all of the useless sections for us. Note that Aero does do stack unwinding on panic, instead
70-
* of aborting, but it does not use the eh frame. See the `aero_kernel/src/unwind.rs` file for more
71-
* information.
72-
*/
73-
/DISCARD/ : {
74-
*(.comment*)
75-
*(.eh_frame*)
76-
*(.gcc_except_table*)
77-
*(.note*)
78-
*(.rel.eh_frame*)
79-
}
80-
}
53+
} :data
54+
}

src/Cargo.lock

Lines changed: 8 additions & 25 deletions
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src/aero_kernel/Cargo.toml

Lines changed: 8 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -23,22 +23,27 @@ syslog = []
2323
default = ["round-robin"]
2424

2525
[dependencies]
26-
spin = "0.9.2"
26+
spin = { version = "0.9.4", default-features = false, features = [
27+
"spin_mutex",
28+
"rwlock",
29+
"once",
30+
] }
2731
bitflags = "1.2.1"
2832
bit_field = "0.10.1"
2933
log = "0.4.14"
3034
raw-cpuid = "10.0.0"
3135
xmas-elf = "0.8.0"
32-
hashbrown = "0.11.2"
36+
hashbrown = { version = "0.12.3" }
3337
rustc-demangle = "0.1.20"
34-
stivale-boot = "0.2.6"
3538
intrusive-collections = "0.9.2"
3639
serde_json = { version = "1.0", default-features = false, features = ["alloc"] }
3740
lai = { git = "https://github.com/aero-os/lai-rs" }
3841
uapi = { path = "../uapi" }
3942
cpio_reader = { git = "https://github.com/Andy-Python-Programmer/cpio_reader" }
4043
static_assertions = "1.1.0"
4144

45+
limine = { path = "../../../limine-rs" }
46+
4247
[dependencies.vte]
4348
git = "https://github.com/Andy-Python-Programmer/vte"
4449
features = ["no_std"]

src/aero_kernel/src/acpi/madt.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -60,6 +60,7 @@ pub struct Madt {
6060

6161
impl Madt {
6262
pub(super) fn init(&'static self) {
63+
return;
6364
log::debug!("storing AP trampoline at 0x1000");
6465

6566
let page_index = unsafe { smp_prepare_trampoline() };

src/aero_kernel/src/acpi/mod.rs

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@
2525
use spin::Once;
2626

2727
use crate::{
28-
mem::paging::{PhysAddr, VirtAddr},
28+
mem::paging::VirtAddr,
2929
utils::sync::{Mutex, MutexGuard},
3030
};
3131

@@ -104,8 +104,7 @@ pub fn get_acpi_table() -> MutexGuard<'static, AcpiTable> {
104104
}
105105

106106
/// Initialize the ACPI tables.
107-
pub fn init(rsdp_address: PhysAddr) {
108-
let rsdp_address = rsdp_address.as_hhdm_virt();
107+
pub fn init(rsdp_address: VirtAddr) {
109108
let acpi_table = AcpiTable::new(rsdp_address);
110109

111110
ACPI_TABLE.call_once(|| Mutex::new(acpi_table));

src/aero_kernel/src/arch/x86_64/gdt.rs

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -31,8 +31,6 @@ use core::mem;
3131

3232
use alloc::alloc::alloc_zeroed;
3333

34-
use crate::mem::paging::VirtAddr;
35-
3634
use crate::arch::tls::PerCpuData;
3735

3836
use super::tls;
@@ -329,11 +327,13 @@ pub fn get_kpcr() -> &'static mut Kpcr {
329327
unsafe { &mut *(io::rdmsr(io::IA32_GS_BASE) as *mut Kpcr) }
330328
}
331329

330+
static STK: [u8; 4096 * 16] = [0; 4096 * 16];
331+
332332
/// Initialize the *actual* GDT stored in TLS.
333333
///
334334
/// ## Saftey
335335
/// The heap must be initialized before this function is called.
336-
pub fn init(stack_top: VirtAddr) {
336+
pub fn init() {
337337
let gdt = unsafe {
338338
let gdt_ent_size = core::mem::size_of::<GdtEntry>();
339339
let gdt_ent_align = core::mem::align_of::<GdtEntry>();
@@ -356,7 +356,7 @@ pub fn init(stack_top: VirtAddr) {
356356
gdt[GdtEntryType::TSS as usize].set_limit(mem::size_of::<Tss>() as u32);
357357
gdt[GdtEntryType::TSS_HI as usize].set_raw((tss_ptr as u64) >> 32);
358358

359-
tss_ref.rsp[0] = stack_top.as_u64();
359+
tss_ref.rsp[0] = STK.as_ptr().offset(4096 * 16) as u64;
360360

361361
let gdt_descriptor = GdtDescriptor::new(
362362
(mem::size_of::<[GdtEntry; GDT_ENTRY_COUNT]>() - 1) as u16,

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