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[SPIRV] Preserve bitcast implicit bitcast
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2 files changed

+30
-6
lines changed

2 files changed

+30
-6
lines changed

llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -74,17 +74,17 @@ class SPIRVLegalizePointerCast : public FunctionPass {
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// Returns the loaded value.
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Value *loadVectorFromVector(IRBuilder<> &B, FixedVectorType *SourceType,
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FixedVectorType *TargetType, Value *Source) {
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// We expect the codegen to avoid doing implicit bitcast from a load.
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assert(TargetType->getElementType() == SourceType->getElementType());
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assert(TargetType->getNumElements() < SourceType->getNumElements());
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assert(TargetType->getNumElements() <= SourceType->getNumElements());
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LoadInst *NewLoad = B.CreateLoad(SourceType, Source);
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buildAssignType(B, SourceType, NewLoad);
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Value *AssignType = NewLoad;
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if (TargetType->getElementType() != SourceType->getElementType())
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AssignType = B.CreateBitCast(NewLoad, TargetType);
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buildAssignType(B, SourceType, AssignType);
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SmallVector<int> Mask(/* Size= */ TargetType->getNumElements());
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for (unsigned I = 0; I < TargetType->getNumElements(); ++I)
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Mask[I] = I;
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Value *Output = B.CreateShuffleVector(NewLoad, NewLoad, Mask);
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Value *Output = B.CreateShuffleVector(AssignType, AssignType, Mask);
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buildAssignType(B, TargetType, Output);
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return Output;
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}
Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,24 @@
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; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv-unknown-vulkan %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-vulkan %s -o - -filetype=obj | spirv-val %}
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@.str = private unnamed_addr constant [4 x i8] c"In3\00", align 1
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@.str.2 = private unnamed_addr constant [5 x i8] c"Out3\00", align 1
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; Function Attrs: mustprogress nofree noinline norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none)
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define void @main() local_unnamed_addr #0 {
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; CHECK: %[[#INT32:]] = OpTypeInt 32 0
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; CHECK: %[[#INT4:]] = OpTypeVector %[[#INT32]] 4
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; CHECK: %[[#FLOAT:]] = OpTypeFloat 32
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; CHECK: %[[#FLOAT4:]] = OpTypeVector %[[#FLOAT]] 4
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; CHECK: %[[#BUFFER_LOAD:]] = OpLoad %[[#FLOAT4]] %{{[0-9]+}} Aligned 16
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; CHECK: %[[#VEC_SHUFFLE:]] = OpVectorShuffle %[[#INT4]] %[[#BUFFER_LOAD]] %[[#BUFFER_LOAD]] 0 1 2 3
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%1 = tail call target("spirv.VulkanBuffer", [0 x <4 x float>], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0v4f32_12_0t(i32 0, i32 2, i32 1, i32 0, i1 false, ptr nonnull @.str)
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%2 = tail call target("spirv.VulkanBuffer", [0 x <4 x i32>], 12, 1) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0v4i32_12_1t(i32 0, i32 5, i32 1, i32 0, i1 false, ptr nonnull @.str.2)
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%3 = tail call noundef align 16 dereferenceable(16) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0v4f32_12_0t(target("spirv.VulkanBuffer", [0 x <4 x float>], 12, 0) %1, i32 0)
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%4 = load <4 x i32>, ptr addrspace(11) %3, align 16
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%5 = tail call noundef align 16 dereferenceable(16) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0v4i32_12_1t(target("spirv.VulkanBuffer", [0 x <4 x i32>], 12, 1) %2, i32 0)
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store <4 x i32> %4, ptr addrspace(11) %5, align 16
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ret void
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}
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attributes #0 = { mustprogress nofree noinline norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) "approx-func-fp-math"="true" "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }

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