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remove the fixed-length vector check for the conversion extension
1 parent d679e94 commit 18d0ffa

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2 files changed

+9
-27
lines changed

2 files changed

+9
-27
lines changed

mlir/include/mlir/Dialect/SPIRV/IR/SPIRVIntelExtOps.td

Lines changed: 6 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -53,17 +53,11 @@ def SPIRV_INTELConvertFToBF16Op : SPIRV_IntelVendorOp<"ConvertFToBF16", [SameOpe
5353
];
5454

5555
let arguments = (ins
56-
AnyTypeOf<[
57-
SPIRV_Float32,
58-
FixedVectorOfLengthAndType<[2, 3, 4, 8, 16], [SPIRV_Float32]>
59-
]>:$operand
56+
SPIRV_ScalarOrVectorOf<SPIRV_Float32>:$operand
6057
);
6158

6259
let results = (outs
63-
AnyTypeOf<[
64-
SPIRV_Int16,
65-
FixedVectorOfLengthAndType<[2, 3, 4, 8, 16], [SPIRV_Int16]>
66-
]>:$result
60+
SPIRV_ScalarOrVectorOf<SPIRV_Int16>:$result
6761
);
6862

6963
let assemblyFormat = [{
@@ -105,17 +99,11 @@ def SPIRV_INTELConvertBF16ToFOp : SPIRV_IntelVendorOp<"ConvertBF16ToF", [SameOpe
10599
];
106100

107101
let arguments = (ins
108-
AnyTypeOf<[
109-
SPIRV_Int16,
110-
FixedVectorOfLengthAndType<[2, 3, 4, 8, 16], [SPIRV_Int16]>
111-
]>:$operand
102+
SPIRV_ScalarOrVectorOf<SPIRV_Int16>:$operand
112103
);
113104

114105
let results = (outs
115-
AnyTypeOf<[
116-
SPIRV_Float32,
117-
FixedVectorOfLengthAndType<[2, 3, 4, 8, 16], [SPIRV_Float32]>
118-
]>:$result
106+
SPIRV_ScalarOrVectorOf<SPIRV_Float32>:$result
119107
);
120108

121109
let assemblyFormat = [{
@@ -159,17 +147,11 @@ def SPIRV_INTELRoundFToTF32Op : SPIRV_IntelVendorOp<"RoundFToTF32", [SameOperand
159147
];
160148

161149
let arguments = (ins
162-
AnyTypeOf<[
163-
SPIRV_Float32,
164-
FixedVectorOfLengthAndType<[2, 3, 4, 8, 16], [SPIRV_Float32]>
165-
]>:$operand
150+
SPIRV_ScalarOrVectorOf<SPIRV_Float32>:$operand
166151
);
167152

168153
let results = (outs
169-
AnyTypeOf<[
170-
SPIRV_Float32,
171-
FixedVectorOfLengthAndType<[2, 3, 4, 8, 16], [SPIRV_Float32]>
172-
]>:$result
154+
SPIRV_ScalarOrVectorOf<SPIRV_Float32>:$result
173155
);
174156

175157
let assemblyFormat = [{

mlir/test/Dialect/SPIRV/IR/intel-ext-ops.mlir

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,7 @@ spirv.func @f32_to_bf16_vec(%arg0 : vector<2xf32>) "None" {
2121
// -----
2222

2323
spirv.func @f32_to_bf16_unsupported(%arg0 : f64) "None" {
24-
// expected-error @+1 {{op operand #0 must be Float32 or fixed-length vector of Float32 values of length 2/3/4/8/16, but got 'f64'}}
24+
// expected-error @+1 {{op operand #0 must be Float32 or vector of Float32 values of length 2/3/4/8/16, but got 'f64'}}
2525
%0 = spirv.INTEL.ConvertFToBF16 %arg0 : f64 to i16
2626
spirv.Return
2727
}
@@ -57,7 +57,7 @@ spirv.func @bf16_to_f32_vec(%arg0 : vector<2xi16>) "None" {
5757
// -----
5858

5959
spirv.func @bf16_to_f32_unsupported(%arg0 : i16) "None" {
60-
// expected-error @+1 {{op result #0 must be Float32 or fixed-length vector of Float32 values of length 2/3/4/8/16, but got 'f16'}}
60+
// expected-error @+1 {{op result #0 must be Float32 or vector of Float32 values of length 2/3/4/8/16, but got 'f16'}}
6161
%0 = spirv.INTEL.ConvertBF16ToF %arg0 : i16 to f16
6262
spirv.Return
6363
}
@@ -93,7 +93,7 @@ spirv.func @f32_to_tf32_vec(%arg0 : vector<2xf32>) "None" {
9393
// -----
9494

9595
spirv.func @f32_to_tf32_unsupported(%arg0 : f64) "None" {
96-
// expected-error @+1 {{op operand #0 must be Float32 or fixed-length vector of Float32 values of length 2/3/4/8/16, but got 'f64'}}
96+
// expected-error @+1 {{op operand #0 must be Float32 or vector of Float32 values of length 2/3/4/8/16, but got 'f64'}}
9797
%0 = spirv.INTEL.RoundFToTF32 %arg0 : f64 to f32
9898
spirv.Return
9999
}

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