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Cherry-pick #150624
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llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -983,9 +983,7 @@ InstructionCost RISCVTTIImpl::getInterleavedMemoryOpCost(
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// with an adjacent appropriate memory to vlseg/vsseg intrinsics. vlseg/vsseg
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// only support masking per-iteration (i.e. condition), not per-segment (i.e.
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// gap).
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// TODO: Support masked interleaved access for fixed length vector.
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if ((isa<ScalableVectorType>(VecTy) || !UseMaskForCond) && !UseMaskForGaps &&
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Factor <= TLI->getMaxSupportedInterleaveFactor()) {
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if (!UseMaskForGaps && Factor <= TLI->getMaxSupportedInterleaveFactor()) {
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auto *VTy = cast<VectorType>(VecTy);
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std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(VTy);
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// Need to make sure type has't been scalarized

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