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[AArch64] Use CNEG for absolute difference patterns. (#151177)
The current code generated for absolute difference patterns (a > b ? a - b : b - a) typically consists of sequences of: ``` sub w8, w1, w0 subs w9, w0, w1 csel w0, w9, w8, hi ``` The first sub is redundant if the csel is replaced by a cneg: ``` subs w8, w0, w1 cneg w0, w8, ls ``` This is achieved by canonicalising ``` select_cc lhs, rhs, sub(lhs, rhs), sub(rhs, lhs), cc -> select_cc lhs, rhs, sub(lhs, rhs), neg(sub(lhs, rhs)), cc select_cc lhs, rhs, sub(rhs, lhs), sub(lhs, rhs), cc -> select_cc lhs, rhs, neg(sub(lhs, rhs)), sub(lhs, rhs), cc ``` as the second forms can already be matched. This helps with some of the patterns in #118413.
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‎llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11386,6 +11386,22 @@ SDValue AArch64TargetLowering::LowerSELECT_CC(
1138611386
return DAG.getNode(ISD::AND, DL, VT, LHS, Shift);
1138711387
}
1138811388

11389+
// Canonicalise absolute difference patterns:
11390+
// select_cc lhs, rhs, sub(lhs, rhs), sub(rhs, lhs), cc ->
11391+
// select_cc lhs, rhs, sub(lhs, rhs), neg(sub(lhs, rhs)), cc
11392+
//
11393+
// select_cc lhs, rhs, sub(rhs, lhs), sub(lhs, rhs), cc ->
11394+
// select_cc lhs, rhs, neg(sub(lhs, rhs)), sub(lhs, rhs), cc
11395+
// The second forms can be matched into subs+cneg.
11396+
if (TVal.getOpcode() == ISD::SUB && FVal.getOpcode() == ISD::SUB) {
11397+
if (TVal.getOperand(0) == LHS && TVal.getOperand(1) == RHS &&
11398+
FVal.getOperand(0) == RHS && FVal.getOperand(1) == LHS)
11399+
FVal = DAG.getNegative(TVal, DL, TVal.getValueType());
11400+
else if (TVal.getOperand(0) == RHS && TVal.getOperand(1) == LHS &&
11401+
FVal.getOperand(0) == LHS && FVal.getOperand(1) == RHS)
11402+
TVal = DAG.getNegative(FVal, DL, FVal.getValueType());
11403+
}
11404+
1138911405
unsigned Opcode = AArch64ISD::CSEL;
1139011406

1139111407
// If both the TVal and the FVal are constants, see if we can swap them in

‎llvm/test/CodeGen/AArch64/abds-neg.ll

Lines changed: 16 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -77,10 +77,8 @@ define i16 @abd_ext_i16_i32(i16 %a, i32 %b) nounwind {
7777
; CHECK-LABEL: abd_ext_i16_i32:
7878
; CHECK: // %bb.0:
7979
; CHECK-NEXT: sxth w8, w0
80-
; CHECK-NEXT: sub w9, w1, w8
81-
; CHECK-NEXT: subs w8, w8, w1
82-
; CHECK-NEXT: csel w8, w8, w9, gt
83-
; CHECK-NEXT: neg w0, w8
80+
; CHECK-NEXT: subs w8, w1, w8
81+
; CHECK-NEXT: cneg w0, w8, ge
8482
; CHECK-NEXT: ret
8583
%aext = sext i16 %a to i64
8684
%bext = sext i32 %b to i64
@@ -111,10 +109,8 @@ define i16 @abd_ext_i16_undef(i16 %a, i16 %b) nounwind {
111109
define i32 @abd_ext_i32(i32 %a, i32 %b) nounwind {
112110
; CHECK-LABEL: abd_ext_i32:
113111
; CHECK: // %bb.0:
114-
; CHECK-NEXT: sub w8, w1, w0
115-
; CHECK-NEXT: subs w9, w0, w1
116-
; CHECK-NEXT: csel w8, w9, w8, gt
117-
; CHECK-NEXT: neg w0, w8
112+
; CHECK-NEXT: subs w8, w1, w0
113+
; CHECK-NEXT: cneg w0, w8, ge
118114
; CHECK-NEXT: ret
119115
%aext = sext i32 %a to i64
120116
%bext = sext i32 %b to i64
@@ -129,10 +125,8 @@ define i32 @abd_ext_i32_i16(i32 %a, i16 %b) nounwind {
129125
; CHECK-LABEL: abd_ext_i32_i16:
130126
; CHECK: // %bb.0:
131127
; CHECK-NEXT: sxth w8, w1
132-
; CHECK-NEXT: sub w9, w8, w0
133-
; CHECK-NEXT: subs w8, w0, w8
134-
; CHECK-NEXT: csel w8, w8, w9, gt
135-
; CHECK-NEXT: neg w0, w8
128+
; CHECK-NEXT: subs w8, w8, w0
129+
; CHECK-NEXT: cneg w0, w8, ge
136130
; CHECK-NEXT: ret
137131
%aext = sext i32 %a to i64
138132
%bext = sext i16 %b to i64
@@ -146,10 +140,8 @@ define i32 @abd_ext_i32_i16(i32 %a, i16 %b) nounwind {
146140
define i32 @abd_ext_i32_undef(i32 %a, i32 %b) nounwind {
147141
; CHECK-LABEL: abd_ext_i32_undef:
148142
; CHECK: // %bb.0:
149-
; CHECK-NEXT: sub w8, w1, w0
150-
; CHECK-NEXT: subs w9, w0, w1
151-
; CHECK-NEXT: csel w8, w9, w8, gt
152-
; CHECK-NEXT: neg w0, w8
143+
; CHECK-NEXT: subs w8, w1, w0
144+
; CHECK-NEXT: cneg w0, w8, ge
153145
; CHECK-NEXT: ret
154146
%aext = sext i32 %a to i64
155147
%bext = sext i32 %b to i64
@@ -163,10 +155,8 @@ define i32 @abd_ext_i32_undef(i32 %a, i32 %b) nounwind {
163155
define i64 @abd_ext_i64(i64 %a, i64 %b) nounwind {
164156
; CHECK-LABEL: abd_ext_i64:
165157
; CHECK: // %bb.0:
166-
; CHECK-NEXT: sub x8, x1, x0
167-
; CHECK-NEXT: subs x9, x0, x1
168-
; CHECK-NEXT: csel x8, x9, x8, gt
169-
; CHECK-NEXT: neg x0, x8
158+
; CHECK-NEXT: subs x8, x1, x0
159+
; CHECK-NEXT: cneg x0, x8, ge
170160
; CHECK-NEXT: ret
171161
%aext = sext i64 %a to i128
172162
%bext = sext i64 %b to i128
@@ -180,10 +170,8 @@ define i64 @abd_ext_i64(i64 %a, i64 %b) nounwind {
180170
define i64 @abd_ext_i64_undef(i64 %a, i64 %b) nounwind {
181171
; CHECK-LABEL: abd_ext_i64_undef:
182172
; CHECK: // %bb.0:
183-
; CHECK-NEXT: sub x8, x1, x0
184-
; CHECK-NEXT: subs x9, x0, x1
185-
; CHECK-NEXT: csel x8, x9, x8, gt
186-
; CHECK-NEXT: neg x0, x8
173+
; CHECK-NEXT: subs x8, x1, x0
174+
; CHECK-NEXT: cneg x0, x8, ge
187175
; CHECK-NEXT: ret
188176
%aext = sext i64 %a to i128
189177
%bext = sext i64 %b to i128
@@ -359,9 +347,8 @@ define i16 @abd_cmp_i16(i16 %a, i16 %b) nounwind {
359347
define i32 @abd_cmp_i32(i32 %a, i32 %b) nounwind {
360348
; CHECK-LABEL: abd_cmp_i32:
361349
; CHECK: // %bb.0:
362-
; CHECK-NEXT: sub w8, w1, w0
363-
; CHECK-NEXT: subs w9, w0, w1
364-
; CHECK-NEXT: csel w0, w8, w9, ge
350+
; CHECK-NEXT: subs w8, w0, w1
351+
; CHECK-NEXT: cneg w0, w8, ge
365352
; CHECK-NEXT: ret
366353
%cmp = icmp sge i32 %a, %b
367354
%ab = sub i32 %a, %b
@@ -373,9 +360,8 @@ define i32 @abd_cmp_i32(i32 %a, i32 %b) nounwind {
373360
define i64 @abd_cmp_i64(i64 %a, i64 %b) nounwind {
374361
; CHECK-LABEL: abd_cmp_i64:
375362
; CHECK: // %bb.0:
376-
; CHECK-NEXT: sub x8, x1, x0
377-
; CHECK-NEXT: subs x9, x0, x1
378-
; CHECK-NEXT: csel x0, x9, x8, lt
363+
; CHECK-NEXT: subs x8, x0, x1
364+
; CHECK-NEXT: cneg x0, x8, ge
379365
; CHECK-NEXT: ret
380366
%cmp = icmp slt i64 %a, %b
381367
%ab = sub i64 %a, %b

‎llvm/test/CodeGen/AArch64/abds.ll

Lines changed: 22 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -73,9 +73,8 @@ define i16 @abd_ext_i16_i32(i16 %a, i32 %b) nounwind {
7373
; CHECK-LABEL: abd_ext_i16_i32:
7474
; CHECK: // %bb.0:
7575
; CHECK-NEXT: sxth w8, w0
76-
; CHECK-NEXT: sub w9, w1, w8
7776
; CHECK-NEXT: subs w8, w8, w1
78-
; CHECK-NEXT: csel w0, w8, w9, gt
77+
; CHECK-NEXT: cneg w0, w8, le
7978
; CHECK-NEXT: ret
8079
%aext = sext i16 %a to i64
8180
%bext = sext i32 %b to i64
@@ -104,9 +103,8 @@ define i16 @abd_ext_i16_undef(i16 %a, i16 %b) nounwind {
104103
define i32 @abd_ext_i32(i32 %a, i32 %b) nounwind {
105104
; CHECK-LABEL: abd_ext_i32:
106105
; CHECK: // %bb.0:
107-
; CHECK-NEXT: sub w8, w1, w0
108-
; CHECK-NEXT: subs w9, w0, w1
109-
; CHECK-NEXT: csel w0, w9, w8, gt
106+
; CHECK-NEXT: subs w8, w0, w1
107+
; CHECK-NEXT: cneg w0, w8, le
110108
; CHECK-NEXT: ret
111109
%aext = sext i32 %a to i64
112110
%bext = sext i32 %b to i64
@@ -120,9 +118,8 @@ define i32 @abd_ext_i32_i16(i32 %a, i16 %b) nounwind {
120118
; CHECK-LABEL: abd_ext_i32_i16:
121119
; CHECK: // %bb.0:
122120
; CHECK-NEXT: sxth w8, w1
123-
; CHECK-NEXT: sub w9, w8, w0
124121
; CHECK-NEXT: subs w8, w0, w8
125-
; CHECK-NEXT: csel w0, w8, w9, gt
122+
; CHECK-NEXT: cneg w0, w8, le
126123
; CHECK-NEXT: ret
127124
%aext = sext i32 %a to i64
128125
%bext = sext i16 %b to i64
@@ -135,9 +132,8 @@ define i32 @abd_ext_i32_i16(i32 %a, i16 %b) nounwind {
135132
define i32 @abd_ext_i32_undef(i32 %a, i32 %b) nounwind {
136133
; CHECK-LABEL: abd_ext_i32_undef:
137134
; CHECK: // %bb.0:
138-
; CHECK-NEXT: sub w8, w1, w0
139-
; CHECK-NEXT: subs w9, w0, w1
140-
; CHECK-NEXT: csel w0, w9, w8, gt
135+
; CHECK-NEXT: subs w8, w0, w1
136+
; CHECK-NEXT: cneg w0, w8, le
141137
; CHECK-NEXT: ret
142138
%aext = sext i32 %a to i64
143139
%bext = sext i32 %b to i64
@@ -150,9 +146,8 @@ define i32 @abd_ext_i32_undef(i32 %a, i32 %b) nounwind {
150146
define i64 @abd_ext_i64(i64 %a, i64 %b) nounwind {
151147
; CHECK-LABEL: abd_ext_i64:
152148
; CHECK: // %bb.0:
153-
; CHECK-NEXT: sub x8, x1, x0
154-
; CHECK-NEXT: subs x9, x0, x1
155-
; CHECK-NEXT: csel x0, x9, x8, gt
149+
; CHECK-NEXT: subs x8, x0, x1
150+
; CHECK-NEXT: cneg x0, x8, le
156151
; CHECK-NEXT: ret
157152
%aext = sext i64 %a to i128
158153
%bext = sext i64 %b to i128
@@ -165,9 +160,8 @@ define i64 @abd_ext_i64(i64 %a, i64 %b) nounwind {
165160
define i64 @abd_ext_i64_undef(i64 %a, i64 %b) nounwind {
166161
; CHECK-LABEL: abd_ext_i64_undef:
167162
; CHECK: // %bb.0:
168-
; CHECK-NEXT: sub x8, x1, x0
169-
; CHECK-NEXT: subs x9, x0, x1
170-
; CHECK-NEXT: csel x0, x9, x8, gt
163+
; CHECK-NEXT: subs x8, x0, x1
164+
; CHECK-NEXT: cneg x0, x8, le
171165
; CHECK-NEXT: ret
172166
%aext = sext i64 %a to i128
173167
%bext = sext i64 %b to i128
@@ -248,9 +242,8 @@ define i16 @abd_minmax_i16(i16 %a, i16 %b) nounwind {
248242
define i32 @abd_minmax_i32(i32 %a, i32 %b) nounwind {
249243
; CHECK-LABEL: abd_minmax_i32:
250244
; CHECK: // %bb.0:
251-
; CHECK-NEXT: sub w8, w1, w0
252-
; CHECK-NEXT: subs w9, w0, w1
253-
; CHECK-NEXT: csel w0, w9, w8, gt
245+
; CHECK-NEXT: subs w8, w0, w1
246+
; CHECK-NEXT: cneg w0, w8, le
254247
; CHECK-NEXT: ret
255248
%min = call i32 @llvm.smin.i32(i32 %a, i32 %b)
256249
%max = call i32 @llvm.smax.i32(i32 %a, i32 %b)
@@ -261,9 +254,8 @@ define i32 @abd_minmax_i32(i32 %a, i32 %b) nounwind {
261254
define i64 @abd_minmax_i64(i64 %a, i64 %b) nounwind {
262255
; CHECK-LABEL: abd_minmax_i64:
263256
; CHECK: // %bb.0:
264-
; CHECK-NEXT: sub x8, x1, x0
265-
; CHECK-NEXT: subs x9, x0, x1
266-
; CHECK-NEXT: csel x0, x9, x8, gt
257+
; CHECK-NEXT: subs x8, x0, x1
258+
; CHECK-NEXT: cneg x0, x8, le
267259
; CHECK-NEXT: ret
268260
%min = call i64 @llvm.smin.i64(i64 %a, i64 %b)
269261
%max = call i64 @llvm.smax.i64(i64 %a, i64 %b)
@@ -324,9 +316,8 @@ define i16 @abd_cmp_i16(i16 %a, i16 %b) nounwind {
324316
define i32 @abd_cmp_i32(i32 %a, i32 %b) nounwind {
325317
; CHECK-LABEL: abd_cmp_i32:
326318
; CHECK: // %bb.0:
327-
; CHECK-NEXT: sub w8, w1, w0
328-
; CHECK-NEXT: subs w9, w0, w1
329-
; CHECK-NEXT: csel w0, w9, w8, gt
319+
; CHECK-NEXT: subs w8, w0, w1
320+
; CHECK-NEXT: cneg w0, w8, le
330321
; CHECK-NEXT: ret
331322
%cmp = icmp slt i32 %a, %b
332323
%ab = sub i32 %a, %b
@@ -338,9 +329,8 @@ define i32 @abd_cmp_i32(i32 %a, i32 %b) nounwind {
338329
define i64 @abd_cmp_i64(i64 %a, i64 %b) nounwind {
339330
; CHECK-LABEL: abd_cmp_i64:
340331
; CHECK: // %bb.0:
341-
; CHECK-NEXT: sub x8, x1, x0
342-
; CHECK-NEXT: subs x9, x0, x1
343-
; CHECK-NEXT: csel x0, x9, x8, gt
332+
; CHECK-NEXT: subs x8, x0, x1
333+
; CHECK-NEXT: cneg x0, x8, le
344334
; CHECK-NEXT: ret
345335
%cmp = icmp sge i64 %a, %b
346336
%ab = sub i64 %a, %b
@@ -572,9 +562,8 @@ define i16 @abd_select_i16(i16 %a, i16 %b) nounwind {
572562
define i32 @abd_select_i32(i32 %a, i32 %b) nounwind {
573563
; CHECK-LABEL: abd_select_i32:
574564
; CHECK: // %bb.0:
575-
; CHECK-NEXT: sub w8, w1, w0
576-
; CHECK-NEXT: subs w9, w0, w1
577-
; CHECK-NEXT: csel w0, w9, w8, gt
565+
; CHECK-NEXT: subs w8, w0, w1
566+
; CHECK-NEXT: cneg w0, w8, le
578567
; CHECK-NEXT: ret
579568
%cmp = icmp sgt i32 %a, %b
580569
%ab = select i1 %cmp, i32 %a, i32 %b
@@ -586,9 +575,8 @@ define i32 @abd_select_i32(i32 %a, i32 %b) nounwind {
586575
define i64 @abd_select_i64(i64 %a, i64 %b) nounwind {
587576
; CHECK-LABEL: abd_select_i64:
588577
; CHECK: // %bb.0:
589-
; CHECK-NEXT: sub x8, x1, x0
590-
; CHECK-NEXT: subs x9, x0, x1
591-
; CHECK-NEXT: csel x0, x9, x8, gt
578+
; CHECK-NEXT: subs x8, x0, x1
579+
; CHECK-NEXT: cneg x0, x8, le
592580
; CHECK-NEXT: ret
593581
%cmp = icmp sge i64 %a, %b
594582
%ab = select i1 %cmp, i64 %a, i64 %b

‎llvm/test/CodeGen/AArch64/abdu-neg.ll

Lines changed: 16 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -77,10 +77,8 @@ define i16 @abd_ext_i16_i32(i16 %a, i32 %b) nounwind {
7777
; CHECK-LABEL: abd_ext_i16_i32:
7878
; CHECK: // %bb.0:
7979
; CHECK-NEXT: and w8, w0, #0xffff
80-
; CHECK-NEXT: sub w9, w1, w8
81-
; CHECK-NEXT: subs w8, w8, w1
82-
; CHECK-NEXT: csel w8, w8, w9, hi
83-
; CHECK-NEXT: neg w0, w8
80+
; CHECK-NEXT: subs w8, w1, w8
81+
; CHECK-NEXT: cneg w0, w8, hs
8482
; CHECK-NEXT: ret
8583
%aext = zext i16 %a to i64
8684
%bext = zext i32 %b to i64
@@ -111,10 +109,8 @@ define i16 @abd_ext_i16_undef(i16 %a, i16 %b) nounwind {
111109
define i32 @abd_ext_i32(i32 %a, i32 %b) nounwind {
112110
; CHECK-LABEL: abd_ext_i32:
113111
; CHECK: // %bb.0:
114-
; CHECK-NEXT: sub w8, w1, w0
115-
; CHECK-NEXT: subs w9, w0, w1
116-
; CHECK-NEXT: csel w8, w9, w8, hi
117-
; CHECK-NEXT: neg w0, w8
112+
; CHECK-NEXT: subs w8, w1, w0
113+
; CHECK-NEXT: cneg w0, w8, hs
118114
; CHECK-NEXT: ret
119115
%aext = zext i32 %a to i64
120116
%bext = zext i32 %b to i64
@@ -129,10 +125,8 @@ define i32 @abd_ext_i32_i16(i32 %a, i16 %b) nounwind {
129125
; CHECK-LABEL: abd_ext_i32_i16:
130126
; CHECK: // %bb.0:
131127
; CHECK-NEXT: and w8, w1, #0xffff
132-
; CHECK-NEXT: sub w9, w8, w0
133-
; CHECK-NEXT: subs w8, w0, w8
134-
; CHECK-NEXT: csel w8, w8, w9, hi
135-
; CHECK-NEXT: neg w0, w8
128+
; CHECK-NEXT: subs w8, w8, w0
129+
; CHECK-NEXT: cneg w0, w8, hs
136130
; CHECK-NEXT: ret
137131
%aext = zext i32 %a to i64
138132
%bext = zext i16 %b to i64
@@ -146,10 +140,8 @@ define i32 @abd_ext_i32_i16(i32 %a, i16 %b) nounwind {
146140
define i32 @abd_ext_i32_undef(i32 %a, i32 %b) nounwind {
147141
; CHECK-LABEL: abd_ext_i32_undef:
148142
; CHECK: // %bb.0:
149-
; CHECK-NEXT: sub w8, w1, w0
150-
; CHECK-NEXT: subs w9, w0, w1
151-
; CHECK-NEXT: csel w8, w9, w8, hi
152-
; CHECK-NEXT: neg w0, w8
143+
; CHECK-NEXT: subs w8, w1, w0
144+
; CHECK-NEXT: cneg w0, w8, hs
153145
; CHECK-NEXT: ret
154146
%aext = zext i32 %a to i64
155147
%bext = zext i32 %b to i64
@@ -163,10 +155,8 @@ define i32 @abd_ext_i32_undef(i32 %a, i32 %b) nounwind {
163155
define i64 @abd_ext_i64(i64 %a, i64 %b) nounwind {
164156
; CHECK-LABEL: abd_ext_i64:
165157
; CHECK: // %bb.0:
166-
; CHECK-NEXT: sub x8, x1, x0
167-
; CHECK-NEXT: subs x9, x0, x1
168-
; CHECK-NEXT: csel x8, x9, x8, hi
169-
; CHECK-NEXT: neg x0, x8
158+
; CHECK-NEXT: subs x8, x1, x0
159+
; CHECK-NEXT: cneg x0, x8, hs
170160
; CHECK-NEXT: ret
171161
%aext = zext i64 %a to i128
172162
%bext = zext i64 %b to i128
@@ -180,10 +170,8 @@ define i64 @abd_ext_i64(i64 %a, i64 %b) nounwind {
180170
define i64 @abd_ext_i64_undef(i64 %a, i64 %b) nounwind {
181171
; CHECK-LABEL: abd_ext_i64_undef:
182172
; CHECK: // %bb.0:
183-
; CHECK-NEXT: sub x8, x1, x0
184-
; CHECK-NEXT: subs x9, x0, x1
185-
; CHECK-NEXT: csel x8, x9, x8, hi
186-
; CHECK-NEXT: neg x0, x8
173+
; CHECK-NEXT: subs x8, x1, x0
174+
; CHECK-NEXT: cneg x0, x8, hs
187175
; CHECK-NEXT: ret
188176
%aext = zext i64 %a to i128
189177
%bext = zext i64 %b to i128
@@ -363,9 +351,8 @@ define i16 @abd_cmp_i16(i16 %a, i16 %b) nounwind {
363351
define i32 @abd_cmp_i32(i32 %a, i32 %b) nounwind {
364352
; CHECK-LABEL: abd_cmp_i32:
365353
; CHECK: // %bb.0:
366-
; CHECK-NEXT: sub w8, w1, w0
367-
; CHECK-NEXT: subs w9, w0, w1
368-
; CHECK-NEXT: csel w0, w8, w9, hs
354+
; CHECK-NEXT: subs w8, w0, w1
355+
; CHECK-NEXT: cneg w0, w8, hs
369356
; CHECK-NEXT: ret
370357
%cmp = icmp uge i32 %a, %b
371358
%ab = sub i32 %a, %b
@@ -377,9 +364,8 @@ define i32 @abd_cmp_i32(i32 %a, i32 %b) nounwind {
377364
define i64 @abd_cmp_i64(i64 %a, i64 %b) nounwind {
378365
; CHECK-LABEL: abd_cmp_i64:
379366
; CHECK: // %bb.0:
380-
; CHECK-NEXT: sub x8, x1, x0
381-
; CHECK-NEXT: subs x9, x0, x1
382-
; CHECK-NEXT: csel x0, x9, x8, lo
367+
; CHECK-NEXT: subs x8, x0, x1
368+
; CHECK-NEXT: cneg x0, x8, hs
383369
; CHECK-NEXT: ret
384370
%cmp = icmp ult i64 %a, %b
385371
%ab = sub i64 %a, %b

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