fixup! [AMDGPU] Ensure non-reserved CSR spilled regs are live-in

macurtis-amd · macurtis-amd · commit 515d5887e308 · 2025-07-28T13:38:00.000-05:00
diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
@@ -1006,7 +1006,7 @@ void SIFrameLowering::emitCSRSpillStores(
         }
       };
 
-  for (const Register &Reg : make_first_range(WWMScratchRegs)) {
+  for (const Register Reg : make_first_range(WWMScratchRegs)) {
     if (!MRI.isReserved(Reg)) {
       MRI.addLiveIn(Reg);
       MBB.addLiveIn(Reg);

Original file line number	Diff line number	Diff line change
`@@ -1006,7 +1006,7 @@ void SIFrameLowering::emitCSRSpillStores(`
`1006`	`1006`	`}`
`1007`	`1007`	`};`
`1008`	`1008`
`1009`		`- for (const Register &Reg : make_first_range(WWMScratchRegs)) {`
	`1009`	`+ for (const Register Reg : make_first_range(WWMScratchRegs)) {`
`1010`	`1010`	`if (!MRI.isReserved(Reg)) {`
`1011`	`1011`	`MRI.addLiveIn(Reg);`
`1012`	`1012`	`MBB.addLiveIn(Reg);`