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[X86][ARM][RISCV][XCore][M68K] Invert the low bit to get the inverse predicate (NFC) (#151748)
All these platforms defined their predicate in such a way to allow bit twiddling to get inverse predicates
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5 files changed

+18
-116
lines changed

5 files changed

+18
-116
lines changed

llvm/lib/Target/ARM/Utils/ARMBaseInfo.h

Lines changed: 5 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -46,23 +46,11 @@ enum CondCodes { // Meaning (integer) Meaning (floating-point)
4646
};
4747

4848
inline static CondCodes getOppositeCondition(CondCodes CC) {
49-
switch (CC) {
50-
default: llvm_unreachable("Unknown condition code");
51-
case EQ: return NE;
52-
case NE: return EQ;
53-
case HS: return LO;
54-
case LO: return HS;
55-
case MI: return PL;
56-
case PL: return MI;
57-
case VS: return VC;
58-
case VC: return VS;
59-
case HI: return LS;
60-
case LS: return HI;
61-
case GE: return LT;
62-
case LT: return GE;
63-
case GT: return LE;
64-
case LE: return GT;
65-
}
49+
// To reverse a condition it's necessary to only invert the low bit:
50+
// Note that unlike in AArch64, flipping the bottom bit for AL is not a valid
51+
// predicate.
52+
assert(CC != AL && "AL has no opposite condition");
53+
return static_cast<CondCodes>(static_cast<unsigned>(CC) ^ 0x1);
6654
}
6755

6856
/// getSwappedCondition - assume the flags are set by MI(a,b), return

llvm/lib/Target/M68k/M68kInstrInfo.h

Lines changed: 3 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -56,42 +56,9 @@ enum CondCode {
5656
// mb tag based
5757

5858
static inline M68k::CondCode GetOppositeBranchCondition(M68k::CondCode CC) {
59-
switch (CC) {
60-
default:
61-
llvm_unreachable("Illegal condition code!");
62-
case M68k::COND_T:
63-
return M68k::COND_F;
64-
case M68k::COND_F:
65-
return M68k::COND_T;
66-
case M68k::COND_HI:
67-
return M68k::COND_LS;
68-
case M68k::COND_LS:
69-
return M68k::COND_HI;
70-
case M68k::COND_CC:
71-
return M68k::COND_CS;
72-
case M68k::COND_CS:
73-
return M68k::COND_CC;
74-
case M68k::COND_NE:
75-
return M68k::COND_EQ;
76-
case M68k::COND_EQ:
77-
return M68k::COND_NE;
78-
case M68k::COND_VC:
79-
return M68k::COND_VS;
80-
case M68k::COND_VS:
81-
return M68k::COND_VC;
82-
case M68k::COND_PL:
83-
return M68k::COND_MI;
84-
case M68k::COND_MI:
85-
return M68k::COND_PL;
86-
case M68k::COND_GE:
87-
return M68k::COND_LT;
88-
case M68k::COND_LT:
89-
return M68k::COND_GE;
90-
case M68k::COND_GT:
91-
return M68k::COND_LE;
92-
case M68k::COND_LE:
93-
return M68k::COND_GT;
94-
}
59+
// To reverse a condition it's necessary to only invert the low bit:
60+
assert(CC != M86k::COND_INVALID && "COND_INVALID has no inverse!");
61+
return static_cast<CondCode>(static_cast<unsigned>(CC) ^ 0x1);
9562
}
9663

9764
static inline unsigned GetCondBranchFromCond(M68k::CondCode CC) {

llvm/lib/Target/RISCV/RISCVInstrInfo.cpp

Lines changed: 3 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -1129,22 +1129,9 @@ unsigned RISCVCC::getBrCond(RISCVCC::CondCode CC, unsigned SelectOpc) {
11291129
}
11301130

11311131
RISCVCC::CondCode RISCVCC::getOppositeBranchCondition(RISCVCC::CondCode CC) {
1132-
switch (CC) {
1133-
default:
1134-
llvm_unreachable("Unrecognized conditional branch");
1135-
case RISCVCC::COND_EQ:
1136-
return RISCVCC::COND_NE;
1137-
case RISCVCC::COND_NE:
1138-
return RISCVCC::COND_EQ;
1139-
case RISCVCC::COND_LT:
1140-
return RISCVCC::COND_GE;
1141-
case RISCVCC::COND_GE:
1142-
return RISCVCC::COND_LT;
1143-
case RISCVCC::COND_LTU:
1144-
return RISCVCC::COND_GEU;
1145-
case RISCVCC::COND_GEU:
1146-
return RISCVCC::COND_LTU;
1147-
}
1132+
// To reverse a condition it's necessary to only invert the low bit:
1133+
assert(CC != RISCVCC::COND_INVALID && "COND_INVALID has no inverse!");
1134+
return static_cast<RISCVCC::CondCode>(static_cast<unsigned>(CC) ^ 0x1);
11481135
}
11491136

11501137
bool RISCVInstrInfo::analyzeBranch(MachineBasicBlock &MBB,

llvm/lib/Target/X86/X86InstrInfo.cpp

Lines changed: 3 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -3300,46 +3300,9 @@ unsigned X86::getNonNDVariant(unsigned Opc) {
33003300
/// Return the inverse of the specified condition,
33013301
/// e.g. turning COND_E to COND_NE.
33023302
X86::CondCode X86::GetOppositeBranchCondition(X86::CondCode CC) {
3303-
switch (CC) {
3304-
default:
3305-
llvm_unreachable("Illegal condition code!");
3306-
case X86::COND_E:
3307-
return X86::COND_NE;
3308-
case X86::COND_NE:
3309-
return X86::COND_E;
3310-
case X86::COND_L:
3311-
return X86::COND_GE;
3312-
case X86::COND_LE:
3313-
return X86::COND_G;
3314-
case X86::COND_G:
3315-
return X86::COND_LE;
3316-
case X86::COND_GE:
3317-
return X86::COND_L;
3318-
case X86::COND_B:
3319-
return X86::COND_AE;
3320-
case X86::COND_BE:
3321-
return X86::COND_A;
3322-
case X86::COND_A:
3323-
return X86::COND_BE;
3324-
case X86::COND_AE:
3325-
return X86::COND_B;
3326-
case X86::COND_S:
3327-
return X86::COND_NS;
3328-
case X86::COND_NS:
3329-
return X86::COND_S;
3330-
case X86::COND_P:
3331-
return X86::COND_NP;
3332-
case X86::COND_NP:
3333-
return X86::COND_P;
3334-
case X86::COND_O:
3335-
return X86::COND_NO;
3336-
case X86::COND_NO:
3337-
return X86::COND_O;
3338-
case X86::COND_NE_OR_P:
3339-
return X86::COND_E_AND_NP;
3340-
case X86::COND_E_AND_NP:
3341-
return X86::COND_NE_OR_P;
3342-
}
3303+
// To reverse a condition it's necessary to only invert the low bit:
3304+
assert(CC != COND_INVALID && "COND_INVALID has no inverse!");
3305+
return static_cast<CondCode>(static_cast<unsigned>(CC) ^ 0x1);
33433306
}
33443307

33453308
/// Assuming the flags are set by MI(a,b), return the condition code if we

llvm/lib/Target/XCore/XCoreInstrInfo.cpp

Lines changed: 4 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -150,13 +150,10 @@ static inline unsigned GetCondBranchFromCond(XCore::CondCode CC)
150150

151151
/// GetOppositeBranchCondition - Return the inverse of the specified
152152
/// condition, e.g. turning COND_E to COND_NE.
153-
static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC)
154-
{
155-
switch (CC) {
156-
default: llvm_unreachable("Illegal condition code!");
157-
case XCore::COND_TRUE : return XCore::COND_FALSE;
158-
case XCore::COND_FALSE : return XCore::COND_TRUE;
159-
}
153+
static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC) {
154+
// To reverse a condition it's necessary to only invert the low bit:
155+
assert(CC != XCore::COND_INVALID && "COND_INVALID has no inverse!");
156+
return static_cast<XCore::CondCode>(static_cast<unsigned>(CC) ^ 0x1);
160157
}
161158

162159
/// analyzeBranch - Analyze the branching code at the end of MBB, returning

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