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Merge branch 'main' into mlir-llvm-module-asm
2 parents dd8b762 + 730d05b commit 97dc0a2

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‎llvm/test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll

Lines changed: 10 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,17 +1,23 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
12
; RUN: opt < %s -passes=instcombine -S | FileCheck %s
23

34
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
45

56
define ptr @foo(ptr %x, i32 %n) {
6-
; CHECK-LABEL: @foo(
7-
; CHECK-NOT: getelementptr
7+
; CHECK-LABEL: define ptr @foo(
8+
; CHECK-SAME: ptr [[X:%.*]], i32 [[N:%.*]]) {
9+
; CHECK-NEXT: ret ptr [[X]]
10+
;
811
%p = getelementptr {}, ptr %x, i32 %n
912
ret ptr %p
1013
}
1114

1215
define ptr @bar(i64 %n, ptr %p) {
13-
; CHECK-LABEL: @bar(
16+
; CHECK-LABEL: define ptr @bar(
17+
; CHECK-SAME: i64 [[N:%.*]], ptr [[P:%.*]]) {
18+
; CHECK-NEXT: [[G:%.*]] = getelementptr { {}, [0 x { [0 x i8] }] }, ptr [[P]], i64 0, i32 1, i64 0, i32 0, i64 [[N]]
19+
; CHECK-NEXT: ret ptr [[G]]
20+
;
1421
%g = getelementptr {{}, [0 x {[0 x i8]}]}, ptr %p, i64 %n, i32 1, i64 %n, i32 0, i64 %n
15-
; CHECK: %p, i64 0, i32 1, i64 0, i32 0, i64 %n
1622
ret ptr %g
1723
}

‎llvm/test/Transforms/InstCombine/gepphigep.ll

Lines changed: 63 additions & 63 deletions
Original file line numberDiff line numberDiff line change
@@ -6,124 +6,124 @@
66
%struct3 = type { i32, %struct4, %struct4 }
77
%struct4 = type { %struct2, %struct2 }
88

9-
define i32 @test1(ptr %dm, i1 %tmp4, i64 %tmp9, i64 %tmp19) {
9+
define i32 @test1(ptr %dm, i1 %c, i64 %idx1, i64 %idx2) {
1010
; CHECK-LABEL: @test1(
1111
; CHECK-NEXT: bb:
12-
; CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DM:%.*]], align 8
13-
; CHECK-NEXT: br i1 [[TMP4:%.*]], label [[BB1:%.*]], label [[BB2:%.*]]
12+
; CHECK-NEXT: [[INST1:%.*]] = load ptr, ptr [[DM:%.*]], align 8
13+
; CHECK-NEXT: br i1 [[C:%.*]], label [[BB1:%.*]], label [[BB2:%.*]]
1414
; CHECK: bb1:
15-
; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT2:%.*]], ptr [[TMP1]], i64 [[TMP9:%.*]]
16-
; CHECK-NEXT: store i32 0, ptr [[TMP10]], align 4
15+
; CHECK-NEXT: [[INST10:%.*]] = getelementptr inbounds [[STRUCT2:%.*]], ptr [[INST1]], i64 [[IDX1:%.*]]
16+
; CHECK-NEXT: store i32 0, ptr [[INST10]], align 4
1717
; CHECK-NEXT: br label [[BB3:%.*]]
1818
; CHECK: bb2:
19-
; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT2]], ptr [[TMP1]], i64 [[TMP19:%.*]]
20-
; CHECK-NEXT: store i32 0, ptr [[TMP20]], align 4
19+
; CHECK-NEXT: [[INST20:%.*]] = getelementptr inbounds [[STRUCT2]], ptr [[INST1]], i64 [[IDX2:%.*]]
20+
; CHECK-NEXT: store i32 0, ptr [[INST20]], align 4
2121
; CHECK-NEXT: br label [[BB3]]
2222
; CHECK: bb3:
23-
; CHECK-NEXT: [[TMP0:%.*]] = phi i64 [ [[TMP9]], [[BB1]] ], [ [[TMP19]], [[BB2]] ]
24-
; CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT2]], ptr [[TMP1]], i64 [[TMP0]], i32 1
25-
; CHECK-NEXT: [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 4
26-
; CHECK-NEXT: ret i32 [[TMP25]]
23+
; CHECK-NEXT: [[TMP0:%.*]] = phi i64 [ [[IDX1]], [[BB1]] ], [ [[IDX2]], [[BB2]] ]
24+
; CHECK-NEXT: [[INST24:%.*]] = getelementptr inbounds [[STRUCT2]], ptr [[INST1]], i64 [[TMP0]], i32 1
25+
; CHECK-NEXT: [[INST25:%.*]] = load i32, ptr [[INST24]], align 4
26+
; CHECK-NEXT: ret i32 [[INST25]]
2727
;
2828
bb:
29-
%tmp1 = load ptr, ptr %dm, align 8
30-
br i1 %tmp4, label %bb1, label %bb2
29+
%inst1 = load ptr, ptr %dm, align 8
30+
br i1 %c, label %bb1, label %bb2
3131

3232
bb1:
33-
%tmp10 = getelementptr inbounds %struct2, ptr %tmp1, i64 %tmp9
34-
store i32 0, ptr %tmp10, align 4
33+
%inst10 = getelementptr inbounds %struct2, ptr %inst1, i64 %idx1
34+
store i32 0, ptr %inst10, align 4
3535
br label %bb3
3636

3737
bb2:
38-
%tmp20 = getelementptr inbounds %struct2, ptr %tmp1, i64 %tmp19
39-
store i32 0, ptr %tmp20, align 4
38+
%inst20 = getelementptr inbounds %struct2, ptr %inst1, i64 %idx2
39+
store i32 0, ptr %inst20, align 4
4040
br label %bb3
4141

4242
bb3:
43-
%phi = phi ptr [ %tmp10, %bb1 ], [ %tmp20, %bb2 ]
44-
%tmp24 = getelementptr inbounds %struct2, ptr %phi, i64 0, i32 1
45-
%tmp25 = load i32, ptr %tmp24, align 4
46-
ret i32 %tmp25
43+
%phi = phi ptr [ %inst10, %bb1 ], [ %inst20, %bb2 ]
44+
%inst24 = getelementptr inbounds %struct2, ptr %phi, i64 0, i32 1
45+
%inst25 = load i32, ptr %inst24, align 4
46+
ret i32 %inst25
4747
}
4848

49-
define i32 @test2(ptr %dm, i1 %tmp4, i64 %tmp9, i64 %tmp19) {
49+
define i32 @test2(ptr %dm, i64 %idx1, i64 %idx2) {
5050
; CHECK-LABEL: @test2(
5151
; CHECK-NEXT: bb:
52-
; CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DM:%.*]], align 8
53-
; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT2:%.*]], ptr [[TMP1]], i64 [[TMP9:%.*]]
54-
; CHECK-NEXT: store i32 0, ptr [[TMP10]], align 4
55-
; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT2]], ptr [[TMP1]], i64 [[TMP19:%.*]]
56-
; CHECK-NEXT: store i32 0, ptr [[TMP20]], align 4
57-
; CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP10]], i64 4
58-
; CHECK-NEXT: [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 4
59-
; CHECK-NEXT: ret i32 [[TMP25]]
52+
; CHECK-NEXT: [[INST1:%.*]] = load ptr, ptr [[DM:%.*]], align 8
53+
; CHECK-NEXT: [[INST10:%.*]] = getelementptr inbounds [[STRUCT2:%.*]], ptr [[INST1]], i64 [[IDX1:%.*]]
54+
; CHECK-NEXT: store i32 0, ptr [[INST10]], align 4
55+
; CHECK-NEXT: [[INST20:%.*]] = getelementptr inbounds [[STRUCT2]], ptr [[INST1]], i64 [[IDX2:%.*]]
56+
; CHECK-NEXT: store i32 0, ptr [[INST20]], align 4
57+
; CHECK-NEXT: [[INST24:%.*]] = getelementptr inbounds nuw i8, ptr [[INST10]], i64 4
58+
; CHECK-NEXT: [[INST25:%.*]] = load i32, ptr [[INST24]], align 4
59+
; CHECK-NEXT: ret i32 [[INST25]]
6060
;
6161
bb:
62-
%tmp1 = load ptr, ptr %dm, align 8
63-
%tmp10 = getelementptr inbounds %struct2, ptr %tmp1, i64 %tmp9
64-
store i32 0, ptr %tmp10, align 4
65-
%tmp20 = getelementptr inbounds %struct2, ptr %tmp1, i64 %tmp19
66-
store i32 0, ptr %tmp20, align 4
67-
%tmp24 = getelementptr inbounds %struct2, ptr %tmp10, i64 0, i32 1
68-
%tmp25 = load i32, ptr %tmp24, align 4
69-
ret i32 %tmp25
62+
%inst1 = load ptr, ptr %dm, align 8
63+
%inst10 = getelementptr inbounds %struct2, ptr %inst1, i64 %idx1
64+
store i32 0, ptr %inst10, align 4
65+
%inst20 = getelementptr inbounds %struct2, ptr %inst1, i64 %idx2
66+
store i32 0, ptr %inst20, align 4
67+
%inst24 = getelementptr inbounds %struct2, ptr %inst10, i64 0, i32 1
68+
%inst25 = load i32, ptr %inst24, align 4
69+
ret i32 %inst25
7070
}
7171

7272
; Check that instcombine doesn't insert GEPs before landingpad.
7373

74-
define i32 @test3(ptr %dm, i1 %tmp4, i64 %tmp9, i64 %tmp19, i64 %tmp20, i64 %tmp21) personality ptr @__gxx_personality_v0 {
74+
define i32 @test3(ptr %dm, i1 %c, i64 %idx1, i64 %idx2, i64 %idx3) personality ptr @__gxx_personality_v0 {
7575
; CHECK-LABEL: @test3(
7676
; CHECK-NEXT: bb:
77-
; CHECK-NEXT: br i1 [[TMP4:%.*]], label [[BB1:%.*]], label [[BB2:%.*]]
77+
; CHECK-NEXT: br i1 [[C:%.*]], label [[BB1:%.*]], label [[BB2:%.*]]
7878
; CHECK: bb1:
79-
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT3:%.*]], ptr [[DM:%.*]], i64 [[TMP19:%.*]], i32 1
80-
; CHECK-NEXT: store i32 0, ptr [[TMP1]], align 4
79+
; CHECK-NEXT: [[INST1:%.*]] = getelementptr inbounds [[STRUCT3:%.*]], ptr [[DM:%.*]], i64 [[IDX1:%.*]], i32 1
80+
; CHECK-NEXT: store i32 0, ptr [[INST1]], align 4
8181
; CHECK-NEXT: br label [[BB3:%.*]]
8282
; CHECK: bb2:
83-
; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT3]], ptr [[DM]], i64 [[TMP20:%.*]], i32 1, i32 0, i32 1
84-
; CHECK-NEXT: store i32 0, ptr [[TMP12]], align 4
83+
; CHECK-NEXT: [[INST12:%.*]] = getelementptr inbounds [[STRUCT3]], ptr [[DM]], i64 [[IDX2:%.*]], i32 1, i32 0, i32 1
84+
; CHECK-NEXT: store i32 0, ptr [[INST12]], align 4
8585
; CHECK-NEXT: br label [[BB3]]
8686
; CHECK: bb3:
87-
; CHECK-NEXT: [[TMP0:%.*]] = phi i64 [ [[TMP19]], [[BB1]] ], [ [[TMP20]], [[BB2]] ]
88-
; CHECK-NEXT: [[TMP22:%.*]] = invoke i32 @foo1(i32 11)
87+
; CHECK-NEXT: [[TMP0:%.*]] = phi i64 [ [[IDX1]], [[BB1]] ], [ [[IDX2]], [[BB2]] ]
88+
; CHECK-NEXT: [[INST22:%.*]] = invoke i32 @foo1(i32 11)
8989
; CHECK-NEXT: to label [[BB4:%.*]] unwind label [[BB5:%.*]]
9090
; CHECK: bb4:
9191
; CHECK-NEXT: ret i32 0
9292
; CHECK: bb5:
93-
; CHECK-NEXT: [[TMP27:%.*]] = landingpad { ptr, i32 }
93+
; CHECK-NEXT: [[INST27:%.*]] = landingpad { ptr, i32 }
9494
; CHECK-NEXT: catch ptr @_ZTIi
9595
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT3]], ptr [[DM]], i64 [[TMP0]], i32 1
96-
; CHECK-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT4:%.*]], ptr [[TMP1]], i64 [[TMP21:%.*]], i32 1, i32 1
97-
; CHECK-NEXT: [[TMP25:%.*]] = load i32, ptr [[TMP35]], align 4
98-
; CHECK-NEXT: ret i32 [[TMP25]]
96+
; CHECK-NEXT: [[INST35:%.*]] = getelementptr inbounds [[STRUCT4:%.*]], ptr [[TMP1]], i64 [[IDX3:%.*]], i32 1, i32 1
97+
; CHECK-NEXT: [[INST25:%.*]] = load i32, ptr [[INST35]], align 4
98+
; CHECK-NEXT: ret i32 [[INST25]]
9999
;
100100
bb:
101-
br i1 %tmp4, label %bb1, label %bb2
101+
br i1 %c, label %bb1, label %bb2
102102

103103
bb1:
104-
%tmp1 = getelementptr inbounds %struct3, ptr %dm, i64 %tmp19, i32 1
105-
store i32 0, ptr %tmp1, align 4
104+
%inst1 = getelementptr inbounds %struct3, ptr %dm, i64 %idx1, i32 1
105+
store i32 0, ptr %inst1, align 4
106106
br label %bb3
107107

108108
bb2:
109-
%tmp2 = getelementptr inbounds %struct3, ptr %dm, i64 %tmp20, i32 1
110-
%tmp12 = getelementptr inbounds %struct4, ptr %tmp2, i64 0, i32 0, i32 1
111-
store i32 0, ptr %tmp12, align 4
109+
%inst2 = getelementptr inbounds %struct3, ptr %dm, i64 %idx2, i32 1
110+
%inst12 = getelementptr inbounds %struct4, ptr %inst2, i64 0, i32 0, i32 1
111+
store i32 0, ptr %inst12, align 4
112112
br label %bb3
113113

114114
bb3:
115-
%phi = phi ptr [ %tmp1, %bb1 ], [ %tmp2, %bb2 ]
116-
%tmp22 = invoke i32 @foo1(i32 11) to label %bb4 unwind label %bb5
115+
%phi = phi ptr [ %inst1, %bb1 ], [ %inst2, %bb2 ]
116+
%inst22 = invoke i32 @foo1(i32 11) to label %bb4 unwind label %bb5
117117

118118
bb4:
119119
ret i32 0
120120

121121
bb5:
122-
%tmp27 = landingpad { ptr, i32 } catch ptr @_ZTIi
123-
%tmp34 = getelementptr inbounds %struct4, ptr %phi, i64 %tmp21, i32 1
124-
%tmp35 = getelementptr inbounds %struct2, ptr %tmp34, i64 0, i32 1
125-
%tmp25 = load i32, ptr %tmp35, align 4
126-
ret i32 %tmp25
122+
%inst27 = landingpad { ptr, i32 } catch ptr @_ZTIi
123+
%inst34 = getelementptr inbounds %struct4, ptr %phi, i64 %idx3, i32 1
124+
%inst35 = getelementptr inbounds %struct2, ptr %inst34, i64 0, i32 1
125+
%inst25 = load i32, ptr %inst35, align 4
126+
ret i32 %inst25
127127
}
128128

129129
@_ZTIi = external constant ptr

‎mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -464,9 +464,12 @@ LogicalResult TosaProfileCompliance::checkInvalid(Operation *op) {
464464
CheckCondition condition = CheckCondition::invalid;
465465
const auto maybeProfDef = getOperatorDefinition<Profile>(op, condition);
466466
const auto maybeExtDef = getOperatorDefinition<Extension>(op, condition);
467+
if (failed(maybeProfDef) && failed(maybeExtDef))
468+
return success();
467469

468-
if (!failed(maybeProfDef) && !failed(maybeExtDef) &&
469-
!maybeProfDef.value().size() && !maybeExtDef.value().size()) {
470+
const bool hasEntry = (succeeded(maybeProfDef) && !maybeProfDef->empty()) ||
471+
(succeeded(maybeExtDef) && !maybeExtDef->empty());
472+
if (!hasEntry) {
470473
std::string message;
471474
llvm::raw_string_ostream os(message);
472475
os << "illegal: operation operand/result data types did not align with any "

‎mlir/test/Dialect/Tosa/invalid.mlir

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2036,3 +2036,19 @@ func.func @test_scatter_duplicate_indices(%arg0: tensor<2x52x3xf32>, %arg2: tens
20362036
%0 = tosa.scatter %arg0, %indices, %arg2 : (tensor<2x52x3xf32>, tensor<2x12xi32>, tensor<2x12x3xf32>) -> tensor<2x52x3xf32>
20372037
return %0 : tensor<2x52x3xf32>
20382038
}
2039+
2040+
// -----
2041+
2042+
func.func @test_reduce_all_unsupported_data_types(%arg0: tensor<2x12x11xf32>) -> tensor<1x12x11xf32> {
2043+
// expected-error@+1 {{'tosa.reduce_all' op illegal: operation operand/result data types did not align with any profile or extension, got (f32,f32), did you mean (i1,i1)?}}
2044+
%0 = tosa.reduce_all %arg0 {axis = 0 : i32} : (tensor<2x12x11xf32>) -> tensor<1x12x11xf32>
2045+
return %0 : tensor<1x12x11xf32>
2046+
}
2047+
2048+
// -----
2049+
2050+
func.func @test_rfft2d(%arg0: tensor<13x8x16xbf16>) -> (tensor<13x8x9xbf16>, tensor<13x8x9xbf16>) {
2051+
// expected-error@+1 {{'tosa.rfft2d' op illegal: operation operand/result data types did not align with any profile or extension, got (bf16,bf16,bf16), did you mean (f32,f32,f32)?}}
2052+
%0, %1 = tosa.rfft2d %arg0 : (tensor<13x8x16xbf16>) -> (tensor<13x8x9xbf16>, tensor<13x8x9xbf16>)
2053+
return %0, %1 : tensor<13x8x9xbf16>, tensor<13x8x9xbf16>
2054+
}

‎mlir/test/Dialect/Tosa/level_check.mlir

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -48,10 +48,10 @@ func.func @test_add_rank_invalid(%arg0: tensor<1x1x1x1x13x21x3xf32>, %arg1: tens
4848

4949
// -----
5050

51-
func.func @test_arithmetic_right_shift_rank_invalid(%arg0: tensor<1x1x1x1x13x21x3xf32>, %arg1: tensor<1x1x1x1x13x21x3xf32>) -> tensor<1x1x1x1x13x21x3xf32> {
51+
func.func @test_arithmetic_right_shift_rank_invalid(%arg0: tensor<1x1x1x1x13x21x3xi32>, %arg1: tensor<1x1x1x1x13x21x3xi32>) -> tensor<1x1x1x1x13x21x3xi32> {
5252
// expected-error@+1 {{'tosa.arithmetic_right_shift' op failed level check: operand rank(shape) <= MAX_RANK}}
53-
%0 = tosa.arithmetic_right_shift %arg0, %arg1 {round = false} : (tensor<1x1x1x1x13x21x3xf32>, tensor<1x1x1x1x13x21x3xf32>) -> tensor<1x1x1x1x13x21x3xf32>
54-
return %0 : tensor<1x1x1x1x13x21x3xf32>
53+
%0 = tosa.arithmetic_right_shift %arg0, %arg1 {round = false} : (tensor<1x1x1x1x13x21x3xi32>, tensor<1x1x1x1x13x21x3xi32>) -> tensor<1x1x1x1x13x21x3xi32>
54+
return %0 : tensor<1x1x1x1x13x21x3xi32>
5555
}
5656

5757
// -----

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