fixup! [AMDGPU] Ensure non-reserved CSR spilled regs are live-in

macurtis-amd · macurtis-amd · commit b0b218a237b9 · 2025-07-07T08:45:26.000-05:00
diff --git a/llvm/test/CodeGen/AMDGPU/bug-undef-spilled-agpr.ll b/llvm/test/CodeGen/AMDGPU/bug-undef-spilled-agpr.ll
@@ -115,7 +115,7 @@ bb54:                                             ; preds = %bb37
   ret i1 true
 
 bb55:                                             ; preds = %bb31, %bb29
-  %load56 = load i1, ptr addrspace(5) null, align 8
+  %load56 = load i1, ptr addrspace(5) %arg25, align 8
   ret i1 %load56
 }
 

Original file line number	Diff line number	Diff line change
`@@ -115,7 +115,7 @@ bb54: ; preds = %bb37`
`115`	`115`	`ret i1 true`
`116`	`116`
`117`	`117`	`bb55: ; preds = %bb31, %bb29`
`118`		`- %load56 = load i1, ptr addrspace(5) null, align 8`
	`118`	`+ %load56 = load i1, ptr addrspace(5) %arg25, align 8`
`119`	`119`	`ret i1 %load56`
`120`	`120`	`}`
`121`	`121`