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[RISCV] Use SDValue::getOperand instead of SDNode::getOperand for consistency. NFC
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llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -634,7 +634,7 @@ bool RISCVDAGToDAGISel::trySignedBitfieldExtract(SDNode *Node) {
634634
// Transform (sra (shl X, C1) C2) with C1 < C2
635635
// -> (SignedBitfieldExtract X, msb, lsb)
636636
if (N0.getOpcode() == ISD::SHL) {
637-
auto *N01C = dyn_cast<ConstantSDNode>(N0->getOperand(1));
637+
auto *N01C = dyn_cast<ConstantSDNode>(N0.getOperand(1));
638638
if (!N01C)
639639
return false;
640640

@@ -750,7 +750,7 @@ bool RISCVDAGToDAGISel::trySignedBitfieldInsertInSign(SDNode *Node) {
750750
// Transform (sra (shl X, C1) C2) with C1 > C2
751751
// -> (NDS.BFOS X, lsb, msb)
752752
if (N0.getOpcode() == ISD::SHL) {
753-
auto *N01C = dyn_cast<ConstantSDNode>(N0->getOperand(1));
753+
auto *N01C = dyn_cast<ConstantSDNode>(N0.getOperand(1));
754754
if (!N01C)
755755
return false;
756756

@@ -1191,7 +1191,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) {
11911191
// Optimize (shl (and X, C2), C) -> (slli (srliw X, C3), C3+C)
11921192
// where C2 has 32 leading zeros and C3 trailing zeros.
11931193
SDNode *SRLIW = CurDAG->getMachineNode(
1194-
RISCV::SRLIW, DL, VT, N0->getOperand(0),
1194+
RISCV::SRLIW, DL, VT, N0.getOperand(0),
11951195
CurDAG->getTargetConstant(TrailingZeros, DL, VT));
11961196
SDNode *SLLI = CurDAG->getMachineNode(
11971197
RISCV::SLLI, DL, VT, SDValue(SRLIW, 0),
@@ -1210,7 +1210,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) {
12101210
// - without Zba a tablegen pattern applies the very same
12111211
// transform as we would have done here
12121212
SDNode *SLLI = CurDAG->getMachineNode(
1213-
RISCV::SLLI, DL, VT, N0->getOperand(0),
1213+
RISCV::SLLI, DL, VT, N0.getOperand(0),
12141214
CurDAG->getTargetConstant(LeadingZeros, DL, VT));
12151215
SDNode *SRLI = CurDAG->getMachineNode(
12161216
RISCV::SRLI, DL, VT, SDValue(SLLI, 0),
@@ -1239,7 +1239,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) {
12391239
unsigned TrailingZeros = llvm::countr_zero(Mask);
12401240
if (LeadingZeros == 32 && TrailingZeros > ShAmt) {
12411241
SDNode *SRLIW = CurDAG->getMachineNode(
1242-
RISCV::SRLIW, DL, VT, N0->getOperand(0),
1242+
RISCV::SRLIW, DL, VT, N0.getOperand(0),
12431243
CurDAG->getTargetConstant(TrailingZeros, DL, VT));
12441244
SDNode *SLLI = CurDAG->getMachineNode(
12451245
RISCV::SLLI, DL, VT, SDValue(SRLIW, 0),
@@ -1266,7 +1266,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) {
12661266
if (TrailingOnes == 32) {
12671267
SDNode *SRLI = CurDAG->getMachineNode(
12681268
Subtarget->is64Bit() ? RISCV::SRLIW : RISCV::SRLI, DL, VT,
1269-
N0->getOperand(0), CurDAG->getTargetConstant(ShAmt, DL, VT));
1269+
N0.getOperand(0), CurDAG->getTargetConstant(ShAmt, DL, VT));
12701270
ReplaceNode(Node, SRLI);
12711271
return;
12721272
}
@@ -1279,19 +1279,19 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) {
12791279
if (HasBitTest && ShAmt + 1 == TrailingOnes) {
12801280
SDNode *BEXTI = CurDAG->getMachineNode(
12811281
Subtarget->hasStdExtZbs() ? RISCV::BEXTI : RISCV::TH_TST, DL, VT,
1282-
N0->getOperand(0), CurDAG->getTargetConstant(ShAmt, DL, VT));
1282+
N0.getOperand(0), CurDAG->getTargetConstant(ShAmt, DL, VT));
12831283
ReplaceNode(Node, BEXTI);
12841284
return;
12851285
}
12861286

12871287
const unsigned Msb = TrailingOnes - 1;
12881288
const unsigned Lsb = ShAmt;
1289-
if (tryUnsignedBitfieldExtract(Node, DL, VT, N0->getOperand(0), Msb, Lsb))
1289+
if (tryUnsignedBitfieldExtract(Node, DL, VT, N0.getOperand(0), Msb, Lsb))
12901290
return;
12911291

12921292
unsigned LShAmt = Subtarget->getXLen() - TrailingOnes;
12931293
SDNode *SLLI =
1294-
CurDAG->getMachineNode(RISCV::SLLI, DL, VT, N0->getOperand(0),
1294+
CurDAG->getMachineNode(RISCV::SLLI, DL, VT, N0.getOperand(0),
12951295
CurDAG->getTargetConstant(LShAmt, DL, VT));
12961296
SDNode *SRLI = CurDAG->getMachineNode(
12971297
RISCV::SRLI, DL, VT, SDValue(SLLI, 0),
@@ -1328,7 +1328,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) {
13281328
break;
13291329
unsigned LShAmt = Subtarget->getXLen() - ExtSize;
13301330
SDNode *SLLI =
1331-
CurDAG->getMachineNode(RISCV::SLLI, DL, VT, N0->getOperand(0),
1331+
CurDAG->getMachineNode(RISCV::SLLI, DL, VT, N0.getOperand(0),
13321332
CurDAG->getTargetConstant(LShAmt, DL, VT));
13331333
SDNode *SRAI = CurDAG->getMachineNode(
13341334
RISCV::SRAI, DL, VT, SDValue(SLLI, 0),

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