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Remove UnsafeFPMath uses
1 parent adcad6a commit f3e71ec

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3 files changed

+9
-7
lines changed

3 files changed

+9
-7
lines changed

llvm/lib/Target/ARM/ARMAsmPrinter.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -695,7 +695,8 @@ void ARMAsmPrinter::emitAttributes() {
695695
DenormalMode::getPositiveZero()))
696696
ATS.emitAttribute(ARMBuildAttrs::ABI_FP_denormal,
697697
ARMBuildAttrs::PositiveZero);
698-
else if (!TM.Options.UnsafeFPMath)
698+
else if (checkDenormalAttributeConsistency(
699+
*MMI->getModule(), "denormal-fp-math", DenormalMode::getIEEE()))
699700
ATS.emitAttribute(ARMBuildAttrs::ABI_FP_denormal,
700701
ARMBuildAttrs::IEEEDenormals);
701702
else {
@@ -730,7 +731,7 @@ void ARMAsmPrinter::emitAttributes() {
730731
TM.Options.NoTrappingFPMath)
731732
ATS.emitAttribute(ARMBuildAttrs::ABI_FP_exceptions,
732733
ARMBuildAttrs::Not_Allowed);
733-
else if (!TM.Options.UnsafeFPMath) {
734+
else {
734735
ATS.emitAttribute(ARMBuildAttrs::ABI_FP_exceptions, ARMBuildAttrs::Allowed);
735736

736737
// If the user has permitted this code to choose the IEEE 754

llvm/lib/Target/ARM/ARMISelLowering.cpp

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -5736,7 +5736,7 @@ static void expandf64Toi32(SDValue Op, SelectionDAG &DAG,
57365736
llvm_unreachable("Unknown VFP cmp argument!");
57375737
}
57385738

5739-
/// OptimizeVFPBrcond - With -enable-unsafe-fp-math, it's legal to optimize some
5739+
/// OptimizeVFPBrcond - With nnan and nsz, it's legal to optimize some
57405740
/// f32 and even f64 comparisons to integer ones.
57415741
SDValue
57425742
ARMTargetLowering::OptimizeVFPBrcond(SDValue Op, SelectionDAG &DAG) const {
@@ -5878,9 +5878,10 @@ SDValue ARMTargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) const {
58785878
return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, Chain, Dest, ARMcc, Cmp);
58795879
}
58805880

5881-
if (getTargetMachine().Options.UnsafeFPMath &&
5882-
(CC == ISD::SETEQ || CC == ISD::SETOEQ ||
5883-
CC == ISD::SETNE || CC == ISD::SETUNE)) {
5881+
if (SDNodeFlags Flags = Op->getFlags();
5882+
Flags.hasNoNaNs() && Flags.hasNoSignedZeros() &&
5883+
(CC == ISD::SETEQ || CC == ISD::SETOEQ || CC == ISD::SETNE ||
5884+
CC == ISD::SETUNE)) {
58845885
if (SDValue Result = OptimizeVFPBrcond(Op, DAG))
58855886
return Result;
58865887
}

llvm/lib/Target/ARM/ARMSubtarget.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -224,7 +224,7 @@ void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
224224
// NEON f32 ops are non-IEEE 754 compliant. Darwin is ok with it by default.
225225
const FeatureBitset &Bits = getFeatureBits();
226226
if ((Bits[ARM::ProcA5] || Bits[ARM::ProcA8]) && // Where this matters
227-
(Options.UnsafeFPMath || isTargetDarwin()))
227+
isTargetDarwin())
228228
HasNEONForFP = true;
229229

230230
if (isRWPI())

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