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RVV assert in inline asm for tied constraints #151877

@Rexicon226

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@Rexicon226
target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"
target triple = "riscv64-unknown-linux5.10.0-musl"

define i16 @foo() {
Entry:
  %0 = call <2 x i8> asm "vadd.vv ${0}, ${1}, ${2}", "=&m,{x11},{x12}"(<2 x i8> zeroinitializer, <2 x i8> zeroinitializer)
  ret i16 0
}
Assertion failed: ((OpInfo.isMultipleAlternative || (OpInfo.Type == InlineAsm::isInput)) && "Can only indirectify direct input operands!"), function visitInlineAsm, file SelectionDAGBuilder.cpp, line 9901.

https://llc.godbolt.org/z/Y8qj3nTdx

Should probably result in an error when selecting the constraint instead of an Assert.

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