From 78b66381d58ec2468136564eba50dee547ad9e15 Mon Sep 17 00:00:00 2001 From: VishMCW Date: Thu, 6 Mar 2025 11:31:53 +0530 Subject: [PATCH 1/4] FEAT: Add support for the intrinsic @llvm.fptosi.sat.* and @llvm.fptoui.sat.* - Add legalizer for G_FPTOSI_SAT and G_FPTOUI_SAT - Add instructionSelector for G_FPTOSI_SAT and G_FPTOUI_SAT - Add function to add saturatedConversion decoration to the intrinsic correct implementation --- llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp | 19 ++ .../Target/SPIRV/SPIRVInstructionSelector.cpp | 5 + llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp | 4 + .../llvm-intrinsics/fp-to-int-intrinsics.ll | 211 ++++++++++++++++++ 4 files changed, 239 insertions(+) create mode 100644 llvm/test/CodeGen/SPIRV/llvm-intrinsics/fp-to-int-intrinsics.ll diff --git a/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp b/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp index 5dfba8427258f..56c1863f7bbc2 100644 --- a/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp @@ -1367,6 +1367,24 @@ static void createSaturatedConversionDecoration(Instruction *I, createDecorationIntrinsic(I, SaturatedConversionNode, B); } +static void addSaturatedDecorationToIntrinsic(Instruction *I, IRBuilder<> &B) { + if (auto *CI = dyn_cast(I)) { + if (Function *Fu = CI->getCalledFunction()) { + if (Fu->isIntrinsic()) { + unsigned const int IntrinsicId = Fu->getIntrinsicID(); + switch (IntrinsicId) { + case Intrinsic::fptosi_sat: + case Intrinsic::fptoui_sat: + createSaturatedConversionDecoration(I, B); + break; + default: + break; + } + } + } + } +} + Instruction *SPIRVEmitIntrinsics::visitCallInst(CallInst &Call) { if (!Call.isInlineAsm()) return &Call; @@ -2442,6 +2460,7 @@ bool SPIRVEmitIntrinsics::runOnFunction(Function &Func) { if (isConvergenceIntrinsic(I)) continue; + addSaturatedDecorationToIntrinsic(I, B); processInstrAfterVisit(I, B); } diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp index c52b67e72a88c..a9d0e0b726351 100644 --- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp @@ -601,6 +601,11 @@ bool SPIRVInstructionSelector::spvSelect(Register ResVReg, case TargetOpcode::G_FPTOUI: return selectUnOp(ResVReg, ResType, I, SPIRV::OpConvertFToU); + case TargetOpcode::G_FPTOSI_SAT: + return selectUnOp(ResVReg, ResType, I, SPIRV::OpConvertFToS); + case TargetOpcode::G_FPTOUI_SAT: + return selectUnOp(ResVReg, ResType, I, SPIRV::OpConvertFToU); + case TargetOpcode::G_SITOFP: return selectIToF(ResVReg, ResType, I, true, SPIRV::OpConvertSToF); case TargetOpcode::G_UITOFP: diff --git a/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp b/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp index daa8ea52ffe03..06f9f5777f416 100644 --- a/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp @@ -236,6 +236,10 @@ SPIRVLegalizerInfo::SPIRVLegalizerInfo(const SPIRVSubtarget &ST) { .legalForCartesianProduct(allIntScalarsAndVectors, allFloatScalarsAndVectors); + getActionDefinitionsBuilder({G_FPTOSI_SAT, G_FPTOUI_SAT}) + .legalForCartesianProduct(allIntScalarsAndVectors, + allFloatScalarsAndVectors); + getActionDefinitionsBuilder({G_SITOFP, G_UITOFP}) .legalForCartesianProduct(allFloatScalarsAndVectors, allScalarsAndVectors); diff --git a/llvm/test/CodeGen/SPIRV/llvm-intrinsics/fp-to-int-intrinsics.ll b/llvm/test/CodeGen/SPIRV/llvm-intrinsics/fp-to-int-intrinsics.ll new file mode 100644 index 0000000000000..1186385de2e36 --- /dev/null +++ b/llvm/test/CodeGen/SPIRV/llvm-intrinsics/fp-to-int-intrinsics.ll @@ -0,0 +1,211 @@ +; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv64-unkown-unknown %s -o - | FileCheck %s +; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unkown-unknown %s -o - -filetype=obj | spirv-val %} + +; CHECK: OpDecorate %[[#SAT1:]] SaturatedConversion +; CHECK: OpDecorate %[[#SAT2:]] SaturatedConversion +; CHECK: OpDecorate %[[#SAT3:]] SaturatedConversion +; CHECK: OpDecorate %[[#SAT4:]] SaturatedConversion +; CHECK: OpDecorate %[[#SAT5:]] SaturatedConversion +; CHECK: OpDecorate %[[#SAT6:]] SaturatedConversion +; CHECK: OpDecorate %[[#SAT7:]] SaturatedConversion +; CHECK: OpDecorate %[[#SAT8:]] SaturatedConversion +; CHECK: OpDecorate %[[#SAT9:]] SaturatedConversion +; CHECK: OpDecorate %[[#SAT10:]] SaturatedConversion +; CHECK: OpDecorate %[[#SAT11:]] SaturatedConversion +; CHECK: OpDecorate %[[#SAT12:]] SaturatedConversion +; CHECK: OpDecorate %[[#SAT13:]] SaturatedConversion +; CHECK: OpDecorate %[[#SAT14:]] SaturatedConversion +; CHECK: OpDecorate %[[#SAT15:]] SaturatedConversion + + +; CHECK: %[[#SAT1:]] = OpConvertFToS %{{[0-9]+}} %[[#]] +define spir_kernel void @testfunction_float_to_signed_i8(float %input) { +entry: + %ptr = alloca i8 + %0 = call i8 @llvm.fptosi.sat.i8.f32(float %input) + store i8 %0, i8* %ptr + ret void + +} +declare i8 @llvm.fptosi.sat.i8.f32(float) + + +; CHECK: %[[#SAT2:]] = OpConvertFToS %{{[0-9]+}} %[[#]] +define spir_kernel void @testfunction_float_to_signed_i16(float %input) { +entry: + %ptr = alloca i16 + %0 = call i16 @llvm.fptosi.sat.i16.f32(float %input) + store i16 %0, i16* %ptr + ret void + +} +declare i16 @llvm.fptosi.sat.i16.f32(float) + +; CHECK: %[[#SAT3:]] = OpConvertFToS %{{[0-9]+}} %[[#]] +define spir_kernel void @testfunction_float_to_signed_i32(float %input) { +entry: + %ptr = alloca i32 + %0 = call i32 @llvm.fptosi.sat.i32.f32(float %input) + store i32 %0, i32* %ptr + ret void + +} +declare i32 @llvm.fptosi.sat.i32.f32(float) + + +; CHECK: %[[#SAT4:]] = OpConvertFToS %{{[0-9]+}} %[[#]] +define spir_kernel void @testfunction_float_to_signed_i64(float %input) { +entry: + %ptr = alloca i64 + %0 = call i64 @llvm.fptosi.sat.i64.f32(float %input) + store i64 %0, i64* %ptr + ret void +} +declare i64 @llvm.fptosi.sat.i64.f32(float) + + +; CHECK: %[[#SAT5:]] = OpConvertFToS %{{[0-9]+}} %[[#]] +define spir_kernel void @testfunction_double_to_signed_i8(double %input) { +entry: + %ptr = alloca i8 + %0 = call i8 @llvm.fptosi.sat.i8.f64(double %input) + store i8 %0, i8* %ptr + ret void +} +declare i8 @llvm.fptosi.sat.i8.f64(double) + + +; CHECK: %[[#SAT6:]] = OpConvertFToS %{{[0-9]+}} %[[#]] +define spir_kernel void @testfunction_double_to_signed_i16(double %input) { +entry: + %ptr = alloca i16 + %0 = call i16 @llvm.fptosi.sat.i16.f64(double %input) + store i16 %0, i16* %ptr + ret void +} +declare i16 @llvm.fptosi.sat.i16.f64(double) + + +; CHECK: %[[#SAT7:]] = OpConvertFToS %{{[0-9]+}} %[[#]] +define spir_kernel void @testfunction_double_to_signed_i32(double %input) { +entry: + %ptr = alloca i32 + %0 = call i32 @llvm.fptosi.sat.i32.f64(double %input) + store i32 %0, i32* %ptr + ret void +} +declare i32 @llvm.fptosi.sat.i32.f64(double) + + +; CHECK: %[[#SAT8:]] = OpConvertFToS %{{[0-9]+}} %[[#]] +define spir_kernel void @testfunction_double_to_signed_i64(double %input) { +entry: + %ptr = alloca i64 + %0 = call i64 @llvm.fptosi.sat.i64.f64(double %input) + store i64 %0, i64* %ptr + ret void +} +declare i64 @llvm.fptosi.sat.i64.f64(double) + + + + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + +; unsigned output + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + + +; CHECK: %[[#SAT8:]] = OpConvertFToU %{{[0-9]+}} %[[#]] +define spir_kernel void @testfunction_float_to_unsigned_i8(float %input) { +entry: + %ptr = alloca i8 + %0 = call i8 @llvm.fptoui.sat.i8.f32(float %input) + store i8 %0, i8* %ptr + ret void +} +declare i8 @llvm.fptoui.sat.i8.f32(float) + + +; CHECK: %[[#SAT9:]] = OpConvertFToU %{{[0-9]+}} %[[#]] +define spir_kernel void @testfunction_float_to_unsigned_i16(float %input) { +entry: + %ptr = alloca i16 + %0 = call i16 @llvm.fptoui.sat.i16.f32(float %input) + store i16 %0, i16* %ptr + ret void +} +declare i16 @llvm.fptoui.sat.i16.f32(float) + + +; CHECK: %[[#SAT10:]] = OpConvertFToU %{{[0-9]+}} %[[#]] +define spir_kernel void @testfunction_float_to_unsigned_i32(float %input) { +entry: + %ptr = alloca i32 + %0 = call i32 @llvm.fptoui.sat.i32.f32(float %input) + store i32 %0, i32* %ptr + ret void +} +declare i32 @llvm.fptoui.sat.i32.f32(float) + + +; CHECK: %[[#SAT11:]] = OpConvertFToU %{{[0-9]+}} %[[#]] +define spir_kernel void @testfunction_float_to_unsigned_i64(float %input) { +entry: + %ptr = alloca i64 + %0 = call i64 @llvm.fptoui.sat.i64.f32(float %input) + store i64 %0, i64* %ptr + ret void +} +declare i64 @llvm.fptoui.sat.i64.f32(float) + + +; CHECK: %[[#SAT12:]] = OpConvertFToU %{{[0-9]+}} %[[#]] +define spir_kernel void @testfunction_double_to_unsigned_i8(double %input) { +entry: + %ptr = alloca i8 + %0 = call i8 @llvm.fptoui.sat.i8.f64(double %input) + store i8 %0, i8* %ptr + ret void +} +declare i8 @llvm.fptoui.sat.i8.f64(double) + + +; CHECK: %[[#SAT13:]] = OpConvertFToU %{{[0-9]+}} %[[#]] +define spir_kernel void @testfunction_double_to_unsigned_i16(double %input) { +entry: + %ptr = alloca i16 + %0 = call i16 @llvm.fptoui.sat.i16.f64(double %input) + store i16 %0, i16* %ptr + ret void +} +declare i16 @llvm.fptoui.sat.i16.f64(double) + + +; CHECK: %[[#SAT14:]] = OpConvertFToU %{{[0-9]+}} %[[#]] +define spir_kernel void @testfunction_double_to_unsigned_i32(double %input) { +entry: + %ptr = alloca i32 + %0 = call i32 @llvm.fptoui.sat.i32.f64(double %input) + store i32 %0, i32* %ptr + ret void +} +declare i32 @llvm.fptoui.sat.i32.f64(double) + + +; CHECK: %[[#SAT15:]] = OpConvertFToU %{{[0-9]+}} %[[#]] +define spir_kernel void @testfunction_double_to_unsigned_i64(double %input) { +entry: + %ptr = alloca i64 + %0 = call i64 @llvm.fptoui.sat.i64.f64(double %input) + store i64 %0, i64* %ptr + ret void +} +declare i64 @llvm.fptoui.sat.i64.f64(double) + + + + + + From d6310dd196366bb3413347cf4404f661e9bec946 Mon Sep 17 00:00:00 2001 From: VishMCW Date: Tue, 29 Apr 2025 22:51:03 +0530 Subject: [PATCH 2/4] minor formatting change --- .../llvm-intrinsics/fp-to-int-intrinsics.ll | 80 ++++++++----------- 1 file changed, 32 insertions(+), 48 deletions(-) diff --git a/llvm/test/CodeGen/SPIRV/llvm-intrinsics/fp-to-int-intrinsics.ll b/llvm/test/CodeGen/SPIRV/llvm-intrinsics/fp-to-int-intrinsics.ll index 1186385de2e36..86baf54fbd81e 100644 --- a/llvm/test/CodeGen/SPIRV/llvm-intrinsics/fp-to-int-intrinsics.ll +++ b/llvm/test/CodeGen/SPIRV/llvm-intrinsics/fp-to-int-intrinsics.ll @@ -22,8 +22,8 @@ define spir_kernel void @testfunction_float_to_signed_i8(float %input) { entry: %ptr = alloca i8 - %0 = call i8 @llvm.fptosi.sat.i8.f32(float %input) - store i8 %0, i8* %ptr + %signed_int = call i8 @llvm.fptosi.sat.i8.f32(float %input) + store i8 %signed_int, i8* %ptr ret void } @@ -34,8 +34,8 @@ declare i8 @llvm.fptosi.sat.i8.f32(float) define spir_kernel void @testfunction_float_to_signed_i16(float %input) { entry: %ptr = alloca i16 - %0 = call i16 @llvm.fptosi.sat.i16.f32(float %input) - store i16 %0, i16* %ptr + %signed_int = call i16 @llvm.fptosi.sat.i16.f32(float %input) + store i16 %signed_int, i16* %ptr ret void } @@ -45,8 +45,8 @@ declare i16 @llvm.fptosi.sat.i16.f32(float) define spir_kernel void @testfunction_float_to_signed_i32(float %input) { entry: %ptr = alloca i32 - %0 = call i32 @llvm.fptosi.sat.i32.f32(float %input) - store i32 %0, i32* %ptr + %signed_int = call i32 @llvm.fptosi.sat.i32.f32(float %input) + store i32 %signed_int, i32* %ptr ret void } @@ -57,8 +57,8 @@ declare i32 @llvm.fptosi.sat.i32.f32(float) define spir_kernel void @testfunction_float_to_signed_i64(float %input) { entry: %ptr = alloca i64 - %0 = call i64 @llvm.fptosi.sat.i64.f32(float %input) - store i64 %0, i64* %ptr + %signed_int = call i64 @llvm.fptosi.sat.i64.f32(float %input) + store i64 %signed_int, i64* %ptr ret void } declare i64 @llvm.fptosi.sat.i64.f32(float) @@ -68,8 +68,8 @@ declare i64 @llvm.fptosi.sat.i64.f32(float) define spir_kernel void @testfunction_double_to_signed_i8(double %input) { entry: %ptr = alloca i8 - %0 = call i8 @llvm.fptosi.sat.i8.f64(double %input) - store i8 %0, i8* %ptr + %signed_int = call i8 @llvm.fptosi.sat.i8.f64(double %input) + store i8 %signed_int, i8* %ptr ret void } declare i8 @llvm.fptosi.sat.i8.f64(double) @@ -79,8 +79,8 @@ declare i8 @llvm.fptosi.sat.i8.f64(double) define spir_kernel void @testfunction_double_to_signed_i16(double %input) { entry: %ptr = alloca i16 - %0 = call i16 @llvm.fptosi.sat.i16.f64(double %input) - store i16 %0, i16* %ptr + %signed_int = call i16 @llvm.fptosi.sat.i16.f64(double %input) + store i16 %signed_int, i16* %ptr ret void } declare i16 @llvm.fptosi.sat.i16.f64(double) @@ -90,8 +90,8 @@ declare i16 @llvm.fptosi.sat.i16.f64(double) define spir_kernel void @testfunction_double_to_signed_i32(double %input) { entry: %ptr = alloca i32 - %0 = call i32 @llvm.fptosi.sat.i32.f64(double %input) - store i32 %0, i32* %ptr + %signed_int = call i32 @llvm.fptosi.sat.i32.f64(double %input) + store i32 %signed_int, i32* %ptr ret void } declare i32 @llvm.fptosi.sat.i32.f64(double) @@ -101,28 +101,18 @@ declare i32 @llvm.fptosi.sat.i32.f64(double) define spir_kernel void @testfunction_double_to_signed_i64(double %input) { entry: %ptr = alloca i64 - %0 = call i64 @llvm.fptosi.sat.i64.f64(double %input) - store i64 %0, i64* %ptr + %signed_int = call i64 @llvm.fptosi.sat.i64.f64(double %input) + store i64 %signed_int, i64* %ptr ret void } declare i64 @llvm.fptosi.sat.i64.f64(double) - - - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; - -; unsigned output - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; - - ; CHECK: %[[#SAT8:]] = OpConvertFToU %{{[0-9]+}} %[[#]] define spir_kernel void @testfunction_float_to_unsigned_i8(float %input) { entry: %ptr = alloca i8 - %0 = call i8 @llvm.fptoui.sat.i8.f32(float %input) - store i8 %0, i8* %ptr + %unsigned_int = call i8 @llvm.fptoui.sat.i8.f32(float %input) + store i8 %unsigned_int, i8* %ptr ret void } declare i8 @llvm.fptoui.sat.i8.f32(float) @@ -132,8 +122,8 @@ declare i8 @llvm.fptoui.sat.i8.f32(float) define spir_kernel void @testfunction_float_to_unsigned_i16(float %input) { entry: %ptr = alloca i16 - %0 = call i16 @llvm.fptoui.sat.i16.f32(float %input) - store i16 %0, i16* %ptr + %unsigned_int = call i16 @llvm.fptoui.sat.i16.f32(float %input) + store i16 %unsigned_int, i16* %ptr ret void } declare i16 @llvm.fptoui.sat.i16.f32(float) @@ -143,8 +133,8 @@ declare i16 @llvm.fptoui.sat.i16.f32(float) define spir_kernel void @testfunction_float_to_unsigned_i32(float %input) { entry: %ptr = alloca i32 - %0 = call i32 @llvm.fptoui.sat.i32.f32(float %input) - store i32 %0, i32* %ptr + %unsigned_int = call i32 @llvm.fptoui.sat.i32.f32(float %input) + store i32 %unsigned_int, i32* %ptr ret void } declare i32 @llvm.fptoui.sat.i32.f32(float) @@ -154,8 +144,8 @@ declare i32 @llvm.fptoui.sat.i32.f32(float) define spir_kernel void @testfunction_float_to_unsigned_i64(float %input) { entry: %ptr = alloca i64 - %0 = call i64 @llvm.fptoui.sat.i64.f32(float %input) - store i64 %0, i64* %ptr + %unsigned_int = call i64 @llvm.fptoui.sat.i64.f32(float %input) + store i64 %unsigned_int, i64* %ptr ret void } declare i64 @llvm.fptoui.sat.i64.f32(float) @@ -165,8 +155,8 @@ declare i64 @llvm.fptoui.sat.i64.f32(float) define spir_kernel void @testfunction_double_to_unsigned_i8(double %input) { entry: %ptr = alloca i8 - %0 = call i8 @llvm.fptoui.sat.i8.f64(double %input) - store i8 %0, i8* %ptr + %unsigned_int = call i8 @llvm.fptoui.sat.i8.f64(double %input) + store i8 %unsigned_int, i8* %ptr ret void } declare i8 @llvm.fptoui.sat.i8.f64(double) @@ -176,8 +166,8 @@ declare i8 @llvm.fptoui.sat.i8.f64(double) define spir_kernel void @testfunction_double_to_unsigned_i16(double %input) { entry: %ptr = alloca i16 - %0 = call i16 @llvm.fptoui.sat.i16.f64(double %input) - store i16 %0, i16* %ptr + %unsigned_int = call i16 @llvm.fptoui.sat.i16.f64(double %input) + store i16 %unsigned_int, i16* %ptr ret void } declare i16 @llvm.fptoui.sat.i16.f64(double) @@ -187,8 +177,8 @@ declare i16 @llvm.fptoui.sat.i16.f64(double) define spir_kernel void @testfunction_double_to_unsigned_i32(double %input) { entry: %ptr = alloca i32 - %0 = call i32 @llvm.fptoui.sat.i32.f64(double %input) - store i32 %0, i32* %ptr + %unsigned_int = call i32 @llvm.fptoui.sat.i32.f64(double %input) + store i32 %unsigned_int, i32* %ptr ret void } declare i32 @llvm.fptoui.sat.i32.f64(double) @@ -198,14 +188,8 @@ declare i32 @llvm.fptoui.sat.i32.f64(double) define spir_kernel void @testfunction_double_to_unsigned_i64(double %input) { entry: %ptr = alloca i64 - %0 = call i64 @llvm.fptoui.sat.i64.f64(double %input) - store i64 %0, i64* %ptr + %unsigned_int = call i64 @llvm.fptoui.sat.i64.f64(double %input) + store i64 %unsigned_int, i64* %ptr ret void } declare i64 @llvm.fptoui.sat.i64.f64(double) - - - - - - From 345e517547561033b22e95a21dec56271e975d00 Mon Sep 17 00:00:00 2001 From: Ebin-McW Date: Thu, 29 May 2025 17:07:29 +0530 Subject: [PATCH 3/4] Update fp-to-int-intrinsics.ll --- .../llvm-intrinsics/fp-to-int-intrinsics.ll | 32 +++++++++---------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/llvm/test/CodeGen/SPIRV/llvm-intrinsics/fp-to-int-intrinsics.ll b/llvm/test/CodeGen/SPIRV/llvm-intrinsics/fp-to-int-intrinsics.ll index 86baf54fbd81e..75caddcd8c7fb 100644 --- a/llvm/test/CodeGen/SPIRV/llvm-intrinsics/fp-to-int-intrinsics.ll +++ b/llvm/test/CodeGen/SPIRV/llvm-intrinsics/fp-to-int-intrinsics.ll @@ -18,7 +18,7 @@ ; CHECK: OpDecorate %[[#SAT15:]] SaturatedConversion -; CHECK: %[[#SAT1:]] = OpConvertFToS %{{[0-9]+}} %[[#]] +; CHECK: %[[#SAT1]] = OpConvertFToS %[[#]] %[[#]] define spir_kernel void @testfunction_float_to_signed_i8(float %input) { entry: %ptr = alloca i8 @@ -30,7 +30,7 @@ entry: declare i8 @llvm.fptosi.sat.i8.f32(float) -; CHECK: %[[#SAT2:]] = OpConvertFToS %{{[0-9]+}} %[[#]] +; CHECK: %[[#SAT2]] = OpConvertFToS %[[#]] %[[#]] define spir_kernel void @testfunction_float_to_signed_i16(float %input) { entry: %ptr = alloca i16 @@ -41,7 +41,7 @@ entry: } declare i16 @llvm.fptosi.sat.i16.f32(float) -; CHECK: %[[#SAT3:]] = OpConvertFToS %{{[0-9]+}} %[[#]] +; CHECK: %[[#SAT3]] = OpConvertFToS %[[#]] %[[#]] define spir_kernel void @testfunction_float_to_signed_i32(float %input) { entry: %ptr = alloca i32 @@ -53,7 +53,7 @@ entry: declare i32 @llvm.fptosi.sat.i32.f32(float) -; CHECK: %[[#SAT4:]] = OpConvertFToS %{{[0-9]+}} %[[#]] +; CHECK: %[[#SAT4]] = OpConvertFToS %[[#]] %[[#]] define spir_kernel void @testfunction_float_to_signed_i64(float %input) { entry: %ptr = alloca i64 @@ -64,7 +64,7 @@ entry: declare i64 @llvm.fptosi.sat.i64.f32(float) -; CHECK: %[[#SAT5:]] = OpConvertFToS %{{[0-9]+}} %[[#]] +; CHECK: %[[#SAT5]] = OpConvertFToS %[[#]] %[[#]] define spir_kernel void @testfunction_double_to_signed_i8(double %input) { entry: %ptr = alloca i8 @@ -75,7 +75,7 @@ entry: declare i8 @llvm.fptosi.sat.i8.f64(double) -; CHECK: %[[#SAT6:]] = OpConvertFToS %{{[0-9]+}} %[[#]] +; CHECK: %[[#SAT6]] = OpConvertFToS %[[#]] %[[#]] define spir_kernel void @testfunction_double_to_signed_i16(double %input) { entry: %ptr = alloca i16 @@ -86,7 +86,7 @@ entry: declare i16 @llvm.fptosi.sat.i16.f64(double) -; CHECK: %[[#SAT7:]] = OpConvertFToS %{{[0-9]+}} %[[#]] +; CHECK: %[[#SAT7]] = OpConvertFToS %[[#]] %[[#]] define spir_kernel void @testfunction_double_to_signed_i32(double %input) { entry: %ptr = alloca i32 @@ -97,7 +97,7 @@ entry: declare i32 @llvm.fptosi.sat.i32.f64(double) -; CHECK: %[[#SAT8:]] = OpConvertFToS %{{[0-9]+}} %[[#]] +; CHECK: %[[#SAT8]] = OpConvertFToS %[[#]] %[[#]] define spir_kernel void @testfunction_double_to_signed_i64(double %input) { entry: %ptr = alloca i64 @@ -107,7 +107,7 @@ entry: } declare i64 @llvm.fptosi.sat.i64.f64(double) -; CHECK: %[[#SAT8:]] = OpConvertFToU %{{[0-9]+}} %[[#]] +; CHECK: %[[#SAT8]] = OpConvertFToU %[[#]] %[[#]] define spir_kernel void @testfunction_float_to_unsigned_i8(float %input) { entry: %ptr = alloca i8 @@ -118,7 +118,7 @@ entry: declare i8 @llvm.fptoui.sat.i8.f32(float) -; CHECK: %[[#SAT9:]] = OpConvertFToU %{{[0-9]+}} %[[#]] +; CHECK: %[[#SAT9]] = OpConvertFToU %[[#]] %[[#]] define spir_kernel void @testfunction_float_to_unsigned_i16(float %input) { entry: %ptr = alloca i16 @@ -129,7 +129,7 @@ entry: declare i16 @llvm.fptoui.sat.i16.f32(float) -; CHECK: %[[#SAT10:]] = OpConvertFToU %{{[0-9]+}} %[[#]] +; CHECK: %[[#SAT10]] = OpConvertFToU %[[#]] %[[#]] define spir_kernel void @testfunction_float_to_unsigned_i32(float %input) { entry: %ptr = alloca i32 @@ -140,7 +140,7 @@ entry: declare i32 @llvm.fptoui.sat.i32.f32(float) -; CHECK: %[[#SAT11:]] = OpConvertFToU %{{[0-9]+}} %[[#]] +; CHECK: %[[#SAT11]] = OpConvertFToU %[[#]] %[[#]] define spir_kernel void @testfunction_float_to_unsigned_i64(float %input) { entry: %ptr = alloca i64 @@ -151,7 +151,7 @@ entry: declare i64 @llvm.fptoui.sat.i64.f32(float) -; CHECK: %[[#SAT12:]] = OpConvertFToU %{{[0-9]+}} %[[#]] +; CHECK: %[[#SAT12]] = OpConvertFToU %[[#]] %[[#]] define spir_kernel void @testfunction_double_to_unsigned_i8(double %input) { entry: %ptr = alloca i8 @@ -162,7 +162,7 @@ entry: declare i8 @llvm.fptoui.sat.i8.f64(double) -; CHECK: %[[#SAT13:]] = OpConvertFToU %{{[0-9]+}} %[[#]] +; CHECK: %[[#SAT13]] = OpConvertFToU %[[#]] %[[#]] define spir_kernel void @testfunction_double_to_unsigned_i16(double %input) { entry: %ptr = alloca i16 @@ -173,7 +173,7 @@ entry: declare i16 @llvm.fptoui.sat.i16.f64(double) -; CHECK: %[[#SAT14:]] = OpConvertFToU %{{[0-9]+}} %[[#]] +; CHECK: %[[#SAT14]] = OpConvertFToU %[[#]] %[[#]] define spir_kernel void @testfunction_double_to_unsigned_i32(double %input) { entry: %ptr = alloca i32 @@ -184,7 +184,7 @@ entry: declare i32 @llvm.fptoui.sat.i32.f64(double) -; CHECK: %[[#SAT15:]] = OpConvertFToU %{{[0-9]+}} %[[#]] +; CHECK: %[[#SAT15]] = OpConvertFToU %[[#]] %[[#]] define spir_kernel void @testfunction_double_to_unsigned_i64(double %input) { entry: %ptr = alloca i64 From 4963c8b25de2aeac86d3820c552a712bbd3a8b76 Mon Sep 17 00:00:00 2001 From: Ebin-McW Date: Fri, 30 May 2025 10:22:32 +0530 Subject: [PATCH 4/4] Update fp-to-int-intrinsics.ll --- .../llvm-intrinsics/fp-to-int-intrinsics.ll | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/llvm/test/CodeGen/SPIRV/llvm-intrinsics/fp-to-int-intrinsics.ll b/llvm/test/CodeGen/SPIRV/llvm-intrinsics/fp-to-int-intrinsics.ll index 75caddcd8c7fb..66c744f780ddc 100644 --- a/llvm/test/CodeGen/SPIRV/llvm-intrinsics/fp-to-int-intrinsics.ll +++ b/llvm/test/CodeGen/SPIRV/llvm-intrinsics/fp-to-int-intrinsics.ll @@ -16,6 +16,7 @@ ; CHECK: OpDecorate %[[#SAT13:]] SaturatedConversion ; CHECK: OpDecorate %[[#SAT14:]] SaturatedConversion ; CHECK: OpDecorate %[[#SAT15:]] SaturatedConversion +; CHECK: OpDecorate %[[#SAT16:]] SaturatedConversion ; CHECK: %[[#SAT1]] = OpConvertFToS %[[#]] %[[#]] @@ -107,7 +108,7 @@ entry: } declare i64 @llvm.fptosi.sat.i64.f64(double) -; CHECK: %[[#SAT8]] = OpConvertFToU %[[#]] %[[#]] +; CHECK: %[[#SAT9]] = OpConvertFToU %[[#]] %[[#]] define spir_kernel void @testfunction_float_to_unsigned_i8(float %input) { entry: %ptr = alloca i8 @@ -118,7 +119,7 @@ entry: declare i8 @llvm.fptoui.sat.i8.f32(float) -; CHECK: %[[#SAT9]] = OpConvertFToU %[[#]] %[[#]] +; CHECK: %[[#SAT10]] = OpConvertFToU %[[#]] %[[#]] define spir_kernel void @testfunction_float_to_unsigned_i16(float %input) { entry: %ptr = alloca i16 @@ -129,7 +130,7 @@ entry: declare i16 @llvm.fptoui.sat.i16.f32(float) -; CHECK: %[[#SAT10]] = OpConvertFToU %[[#]] %[[#]] +; CHECK: %[[#SAT11]] = OpConvertFToU %[[#]] %[[#]] define spir_kernel void @testfunction_float_to_unsigned_i32(float %input) { entry: %ptr = alloca i32 @@ -140,7 +141,7 @@ entry: declare i32 @llvm.fptoui.sat.i32.f32(float) -; CHECK: %[[#SAT11]] = OpConvertFToU %[[#]] %[[#]] +; CHECK: %[[#SAT12]] = OpConvertFToU %[[#]] %[[#]] define spir_kernel void @testfunction_float_to_unsigned_i64(float %input) { entry: %ptr = alloca i64 @@ -151,7 +152,7 @@ entry: declare i64 @llvm.fptoui.sat.i64.f32(float) -; CHECK: %[[#SAT12]] = OpConvertFToU %[[#]] %[[#]] +; CHECK: %[[#SAT13]] = OpConvertFToU %[[#]] %[[#]] define spir_kernel void @testfunction_double_to_unsigned_i8(double %input) { entry: %ptr = alloca i8 @@ -162,7 +163,7 @@ entry: declare i8 @llvm.fptoui.sat.i8.f64(double) -; CHECK: %[[#SAT13]] = OpConvertFToU %[[#]] %[[#]] +; CHECK: %[[#SAT14]] = OpConvertFToU %[[#]] %[[#]] define spir_kernel void @testfunction_double_to_unsigned_i16(double %input) { entry: %ptr = alloca i16 @@ -173,7 +174,7 @@ entry: declare i16 @llvm.fptoui.sat.i16.f64(double) -; CHECK: %[[#SAT14]] = OpConvertFToU %[[#]] %[[#]] +; CHECK: %[[#SAT15]] = OpConvertFToU %[[#]] %[[#]] define spir_kernel void @testfunction_double_to_unsigned_i32(double %input) { entry: %ptr = alloca i32 @@ -184,7 +185,7 @@ entry: declare i32 @llvm.fptoui.sat.i32.f64(double) -; CHECK: %[[#SAT15]] = OpConvertFToU %[[#]] %[[#]] +; CHECK: %[[#SAT16]] = OpConvertFToU %[[#]] %[[#]] define spir_kernel void @testfunction_double_to_unsigned_i64(double %input) { entry: %ptr = alloca i64