diff --git a/mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td b/mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td index 9321089ab55fa..79ed47dd9e765 100644 --- a/mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td +++ b/mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td @@ -1351,7 +1351,11 @@ def MemRef_PrefetchOp : MemRef_Op<"prefetch"> { instruction cache. }]; - let arguments = (ins AnyMemRef:$memref, Variadic:$indices, + // The memref argument is labeled with a MemWrite side effect to enforce a + // relative ordering of the prefetch and other memory operations targeting + // that memory stream. + let arguments = (ins Arg :$memref, + Variadic:$indices, BoolAttr:$isWrite, ConfinedAttr, IntMaxValue<3>]>:$localityHint, diff --git a/mlir/test/Dialect/Bufferization/Transforms/OwnershipBasedBufferDeallocation/misc-other.mlir b/mlir/test/Dialect/Bufferization/Transforms/OwnershipBasedBufferDeallocation/misc-other.mlir index c50c25ad8194f..fc137f1f2f722 100644 --- a/mlir/test/Dialect/Bufferization/Transforms/OwnershipBasedBufferDeallocation/misc-other.mlir +++ b/mlir/test/Dialect/Bufferization/Transforms/OwnershipBasedBufferDeallocation/misc-other.mlir @@ -17,4 +17,12 @@ func.func @func_with_assert(%arg0: index, %arg1: index) { func.func @func_with_assume_alignment(%arg0: memref<128xi8>) { %0 = memref.assume_alignment %arg0, 64 : memref<128xi8> return -} \ No newline at end of file +} + +// CHECK-LABEL: func @func_with_prefetch( +// CHECK: memref.prefetch %arg0[%c0, %c0], read, locality<1>, data : memref<4x8xf32> +func.func @func_with_prefetch(%arg0: memref<4x8xf32>) { + %c0 = arith.constant 0 : index + memref.prefetch %arg0[%c0, %c0], read, locality<1>, data : memref<4x8xf32> + return +}