From 913180d0809a70623523a4ee6d7155b73447d1a7 Mon Sep 17 00:00:00 2001 From: Qi Zhao Date: Mon, 4 Aug 2025 15:51:57 +0800 Subject: [PATCH 1/2] [LoongArch] Pre-commit tests for vector type isLegalAddressingMode implementation --- .../CodeGen/LoongArch/lasx/loop-reduce.ll | 51 +++++++++++++++++++ .../test/CodeGen/LoongArch/lsx/loop-reduce.ll | 43 ++++++++++++++++ 2 files changed, 94 insertions(+) create mode 100644 llvm/test/CodeGen/LoongArch/lasx/loop-reduce.ll create mode 100644 llvm/test/CodeGen/LoongArch/lsx/loop-reduce.ll diff --git a/llvm/test/CodeGen/LoongArch/lasx/loop-reduce.ll b/llvm/test/CodeGen/LoongArch/lasx/loop-reduce.ll new file mode 100644 index 0000000000000..9739d3012bf3c --- /dev/null +++ b/llvm/test/CodeGen/LoongArch/lasx/loop-reduce.ll @@ -0,0 +1,51 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN: llc --mtriple=loongarch64 -mattr=+lasx --verify-machineinstrs < %s \ +; RUN: | FileCheck %s + +;; Modified based on llvm-test-suite: +;; SingleSource/Regression/C/gcc-c-torture/execute/pr56837.c + +@a = dso_local local_unnamed_addr global [1024 x { i32, i32 }] zeroinitializer, align 4 + +define dso_local void @foo() local_unnamed_addr { +; CHECK-LABEL: foo: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: lu12i.w $a0, -2 +; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI0_0) +; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI0_0) +; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI0_1) +; CHECK-NEXT: xvld $xr1, $a1, %pc_lo12(.LCPI0_1) +; CHECK-NEXT: pcalau12i $a1, %pc_hi20(a) +; CHECK-NEXT: addi.d $a1, $a1, %pc_lo12(a) +; CHECK-NEXT: lu12i.w $a2, 2 +; CHECK-NEXT: .p2align 4, , 16 +; CHECK-NEXT: .LBB0_1: # %vector.body +; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 +; CHECK-NEXT: add.d $a3, $a1, $a0 +; CHECK-NEXT: xvldx $xr2, $a3, $a2 +; CHECK-NEXT: xvpermi.d $xr3, $xr2, 78 +; CHECK-NEXT: xvori.b $xr4, $xr0, 0 +; CHECK-NEXT: xvshuf.d $xr4, $xr0, $xr3 +; CHECK-NEXT: xvori.b $xr3, $xr1, 0 +; CHECK-NEXT: xvshuf.w $xr3, $xr4, $xr2 +; CHECK-NEXT: addi.d $a0, $a0, 16 +; CHECK-NEXT: xvstx $xr3, $a3, $a2 +; CHECK-NEXT: bnez $a0, .LBB0_1 +; CHECK-NEXT: # %bb.2: # %for.end +; CHECK-NEXT: ret +entry: + br label %vector.body + +vector.body: ; preds = %vector.body, %entry + %index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ] + %0 = getelementptr inbounds nuw [1024 x { i32, i32 }], ptr @a, i64 0, i64 %index + %a = load <8 x i32>, ptr %0, align 4 + %b = shufflevector <8 x i32> %a, <8 x i32> undef, <8 x i32> + store <8 x i32> %b, ptr %0, align 4 + %index.next = add nuw i64 %index, 2 + %1 = icmp eq i64 %index.next, 1024 + br i1 %1, label %for.end, label %vector.body + +for.end: ; preds = %vector.body + ret void +} diff --git a/llvm/test/CodeGen/LoongArch/lsx/loop-reduce.ll b/llvm/test/CodeGen/LoongArch/lsx/loop-reduce.ll new file mode 100644 index 0000000000000..fbb4d060c9412 --- /dev/null +++ b/llvm/test/CodeGen/LoongArch/lsx/loop-reduce.ll @@ -0,0 +1,43 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN: llc --mtriple=loongarch64 -mattr=+lsx --verify-machineinstrs < %s \ +; RUN: | FileCheck %s + +;; Modified based on llvm-test-suite: +;; SingleSource/Regression/C/gcc-c-torture/execute/pr56837.c + +@a = dso_local local_unnamed_addr global [1024 x { i32, i32 }] zeroinitializer, align 4 + +define dso_local void @foo() local_unnamed_addr { +; CHECK-LABEL: foo: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: lu12i.w $a0, -2 +; CHECK-NEXT: pcalau12i $a1, %pc_hi20(a) +; CHECK-NEXT: addi.d $a1, $a1, %pc_lo12(a) +; CHECK-NEXT: lu12i.w $a2, 2 +; CHECK-NEXT: .p2align 4, , 16 +; CHECK-NEXT: .LBB0_1: # %vector.body +; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 +; CHECK-NEXT: add.d $a3, $a1, $a0 +; CHECK-NEXT: vldx $vr0, $a3, $a2 +; CHECK-NEXT: vshuf4i.w $vr0, $vr0, 9 +; CHECK-NEXT: addi.d $a0, $a0, 16 +; CHECK-NEXT: vstx $vr0, $a3, $a2 +; CHECK-NEXT: bnez $a0, .LBB0_1 +; CHECK-NEXT: # %bb.2: # %for.end +; CHECK-NEXT: ret +entry: + br label %vector.body + +vector.body: ; preds = %vector.body, %entry + %index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ] + %0 = getelementptr inbounds nuw [1024 x { i32, i32 }], ptr @a, i64 0, i64 %index + %a = load <4 x i32>, ptr %0, align 4 + %b = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> + store <4 x i32> %b, ptr %0, align 4 + %index.next = add nuw i64 %index, 2 + %1 = icmp eq i64 %index.next, 1024 + br i1 %1, label %for.end, label %vector.body + +for.end: ; preds = %vector.body + ret void +} From 4c0470de72c78c33bb7ac0b1534e7965bf15edda Mon Sep 17 00:00:00 2001 From: Qi Zhao Date: Mon, 4 Aug 2025 16:50:54 +0800 Subject: [PATCH 2/2] pass format --- llvm/test/CodeGen/LoongArch/lasx/loop-reduce.ll | 2 +- llvm/test/CodeGen/LoongArch/lsx/loop-reduce.ll | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/test/CodeGen/LoongArch/lasx/loop-reduce.ll b/llvm/test/CodeGen/LoongArch/lasx/loop-reduce.ll index 9739d3012bf3c..957f6fc8e5be6 100644 --- a/llvm/test/CodeGen/LoongArch/lasx/loop-reduce.ll +++ b/llvm/test/CodeGen/LoongArch/lasx/loop-reduce.ll @@ -40,7 +40,7 @@ vector.body: ; preds = %vector.body, %entry %index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ] %0 = getelementptr inbounds nuw [1024 x { i32, i32 }], ptr @a, i64 0, i64 %index %a = load <8 x i32>, ptr %0, align 4 - %b = shufflevector <8 x i32> %a, <8 x i32> undef, <8 x i32> + %b = shufflevector <8 x i32> %a, <8 x i32> poison, <8 x i32> store <8 x i32> %b, ptr %0, align 4 %index.next = add nuw i64 %index, 2 %1 = icmp eq i64 %index.next, 1024 diff --git a/llvm/test/CodeGen/LoongArch/lsx/loop-reduce.ll b/llvm/test/CodeGen/LoongArch/lsx/loop-reduce.ll index fbb4d060c9412..b5e7bb6618766 100644 --- a/llvm/test/CodeGen/LoongArch/lsx/loop-reduce.ll +++ b/llvm/test/CodeGen/LoongArch/lsx/loop-reduce.ll @@ -32,7 +32,7 @@ vector.body: ; preds = %vector.body, %entry %index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ] %0 = getelementptr inbounds nuw [1024 x { i32, i32 }], ptr @a, i64 0, i64 %index %a = load <4 x i32>, ptr %0, align 4 - %b = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> + %b = shufflevector <4 x i32> %a, <4 x i32> poison, <4 x i32> store <4 x i32> %b, ptr %0, align 4 %index.next = add nuw i64 %index, 2 %1 = icmp eq i64 %index.next, 1024