@@ -55,17 +55,35 @@ check!(vreg vreg "add {0}.4s, {0}.4s, {0}.4s");
55
55
// CHECK: //NO_APP
56
56
check ! ( vreg_b vreg "ldr {:b}, [x0]" ) ;
57
57
58
+ // CHECK-LABEL: vreg_h:
59
+ // CHECK: //APP
60
+ // CHECK: ldr h0, [x0]
61
+ // CHECK: //NO_APP
62
+ check ! ( vreg_h vreg "ldr {:h}, [x0]" ) ;
63
+
64
+ // CHECK-LABEL: vreg_s:
65
+ // CHECK: //APP
66
+ // CHECK: ldr s0, [x0]
67
+ // CHECK: //NO_APP
68
+ check ! ( vreg_s vreg "ldr {:s}, [x0]" ) ;
69
+
58
70
// CHECK-LABEL: vreg_d:
59
71
// CHECK: //APP
60
72
// CHECK: ldr d0, [x0]
61
73
// CHECK: //NO_APP
62
74
check ! ( vreg_d vreg "ldr {:d}, [x0]" ) ;
63
75
64
- // CHECK-LABEL: vreg_h :
76
+ // CHECK-LABEL: vreg_q :
65
77
// CHECK: //APP
66
- // CHECK: ldr h0 , [x0]
78
+ // CHECK: ldr q0 , [x0]
67
79
// CHECK: //NO_APP
68
- check ! ( vreg_h vreg "ldr {:h}, [x0]" ) ;
80
+ check ! ( vreg_q vreg "ldr {:q}, [x0]" ) ;
81
+
82
+ // CHECK-LABEL: vreg_v:
83
+ // CHECK: //APP
84
+ // CHECK: add v0.4s, v0.4s, v0.4s
85
+ // CHECK: //NO_APP
86
+ check ! ( vreg_v vreg "add {0:v}.4s, {0:v}.4s, {0:v}.4s" ) ;
69
87
70
88
// CHECK-LABEL: vreg_low16:
71
89
// CHECK: //APP
@@ -79,50 +97,32 @@ check!(vreg_low16 vreg_low16 "add {0}.4s, {0}.4s, {0}.4s");
79
97
// CHECK: //NO_APP
80
98
check ! ( vreg_low16_b vreg_low16 "ldr {:b}, [x0]" ) ;
81
99
82
- // CHECK-LABEL: vreg_low16_d:
83
- // CHECK: //APP
84
- // CHECK: ldr d0, [x0]
85
- // CHECK: //NO_APP
86
- check ! ( vreg_low16_d vreg_low16 "ldr {:d}, [x0]" ) ;
87
-
88
100
// CHECK-LABEL: vreg_low16_h:
89
101
// CHECK: //APP
90
102
// CHECK: ldr h0, [x0]
91
103
// CHECK: //NO_APP
92
104
check ! ( vreg_low16_h vreg_low16 "ldr {:h}, [x0]" ) ;
93
105
94
- // CHECK-LABEL: vreg_low16_q:
95
- // CHECK: //APP
96
- // CHECK: ldr q0, [x0]
97
- // CHECK: //NO_APP
98
- check ! ( vreg_low16_q vreg_low16 "ldr {:q}, [x0]" ) ;
99
-
100
106
// CHECK-LABEL: vreg_low16_s:
101
107
// CHECK: //APP
102
108
// CHECK: ldr s0, [x0]
103
109
// CHECK: //NO_APP
104
110
check ! ( vreg_low16_s vreg_low16 "ldr {:s}, [x0]" ) ;
105
111
106
- // CHECK-LABEL: vreg_low16_v :
112
+ // CHECK-LABEL: vreg_low16_d :
107
113
// CHECK: //APP
108
- // CHECK: add v0.4s, v0.4s, v0.4s
114
+ // CHECK: ldr d0, [x0]
109
115
// CHECK: //NO_APP
110
- check ! ( vreg_low16_v vreg_low16 "add {0:v}.4s, {0:v}.4s, {0:v}.4s " ) ;
116
+ check ! ( vreg_low16_d vreg_low16 "ldr {:d}, [x0] " ) ;
111
117
112
- // CHECK-LABEL: vreg_q :
118
+ // CHECK-LABEL: vreg_low16_q :
113
119
// CHECK: //APP
114
120
// CHECK: ldr q0, [x0]
115
121
// CHECK: //NO_APP
116
- check ! ( vreg_q vreg "ldr {:q}, [x0]" ) ;
117
-
118
- // CHECK-LABEL: vreg_s:
119
- // CHECK: //APP
120
- // CHECK: ldr s0, [x0]
121
- // CHECK: //NO_APP
122
- check ! ( vreg_s vreg "ldr {:s}, [x0]" ) ;
122
+ check ! ( vreg_low16_q vreg_low16 "ldr {:q}, [x0]" ) ;
123
123
124
- // CHECK-LABEL: vreg_v :
124
+ // CHECK-LABEL: vreg_low16_v :
125
125
// CHECK: //APP
126
126
// CHECK: add v0.4s, v0.4s, v0.4s
127
127
// CHECK: //NO_APP
128
- check ! ( vreg_v vreg "add {0:v}.4s, {0:v}.4s, {0:v}.4s" ) ;
128
+ check ! ( vreg_low16_v vreg_low16 "add {0:v}.4s, {0:v}.4s, {0:v}.4s" ) ;
0 commit comments