Merge from mainline.

When transforming a vector_shuffle to a load, the base address must not be an undef.

llvm-svn: 50981

Author: tlattner

llvm/lib/Target/X86/X86ISelLowering.cpp

@@ -6283,6 +6283,8 @@ static bool EltsFromConsecutiveLoads(SDNode *N, SDOperand PermMask,
       return false;
     if (!Base) {
       Base = Elt.Val;
+      if (Base->getOpcode() == ISD::UNDEF)
+        return false;
       continue;
     }
     if (Elt.getOpcode() == ISD::UNDEF)

llvm/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll

@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
+
+define fastcc void @glgVectorFloatConversion() nounwind  {
+	%tmp12745 = load <4 x float>* null, align 16		; <<4 x float>> [#uses=1]
+	%tmp12773 = insertelement <4 x float> %tmp12745, float 1.000000e+00, i32 1		; <<4 x float>> [#uses=1]
+	%tmp12774 = insertelement <4 x float> %tmp12773, float 0.000000e+00, i32 2		; <<4 x float>> [#uses=1]
+	%tmp12775 = insertelement <4 x float> %tmp12774, float 1.000000e+00, i32 3		; <<4 x float>> [#uses=1]
+	store <4 x float> %tmp12775, <4 x float>* null, align 16
+	unreachable
+}