[VE] Change name of enum to CondCode

Summary: Change enum name for condition codes from CondCodes to CondCode.

Reviewers: arsenm, simoll, k-ishizaka

Reviewed By: arsenm

Subscribers: wdng, hiraditya, llvm-commits

Tags: #llvm, #ve

Differential Revision: https://reviews.llvm.org/D76747

Author: kaz7

llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.cpp

@@ -113,5 +113,5 @@ void VEInstPrinter::printMemASOperand(const MCInst *MI, int opNum,
 void VEInstPrinter::printCCOperand(const MCInst *MI, int opNum,
                                    const MCSubtargetInfo &STI, raw_ostream &O) {
   int CC = (int)MI->getOperand(opNum).getImm();
-  O << VECondCodeToString((VECC::CondCodes)CC);
+  O << VECondCodeToString((VECC::CondCode)CC);
 }

llvm/lib/Target/VE/VE.h

@@ -37,7 +37,7 @@ namespace llvm {
 // Enums corresponding to VE condition codes, both icc's and fcc's.  These
 // values must be kept in sync with the ones in the .td file.
 namespace VECC {
-enum CondCodes {
+enum CondCode {
   // Integer comparison
   CC_IG =  0,  // Greater
   CC_IL =  1,  // Less
@@ -66,7 +66,7 @@ enum CondCodes {
 };
 }
 
-inline static const char *VECondCodeToString(VECC::CondCodes CC) {
+inline static const char *VECondCodeToString(VECC::CondCode CC) {
   switch (CC) {
   case VECC::CC_IG:    return "gt";
   case VECC::CC_IL:    return "lt";

llvm/lib/Target/VE/VEInstrInfo.cpp

@@ -40,7 +40,7 @@ VEInstrInfo::VEInstrInfo(VESubtarget &ST)
 
 static bool IsIntegerCC(unsigned CC) { return (CC < VECC::CC_AF); }
 
-static VECC::CondCodes GetOppositeBranchCondition(VECC::CondCodes CC) {
+static VECC::CondCode GetOppositeBranchCondition(VECC::CondCode CC) {
   switch(CC) {
   case VECC::CC_IG:     return VECC::CC_ILE;
   case VECC::CC_IL:     return VECC::CC_IGE;
@@ -268,7 +268,7 @@ unsigned VEInstrInfo::removeBranch(MachineBasicBlock &MBB,
 
 bool VEInstrInfo::reverseBranchCondition(
     SmallVectorImpl<MachineOperand> &Cond) const {
-  VECC::CondCodes CC = static_cast<VECC::CondCodes>(Cond[0].getImm());
+  VECC::CondCode CC = static_cast<VECC::CondCode>(Cond[0].getImm());
   Cond[0].setImm(GetOppositeBranchCondition(CC));
   return false;
 }

llvm/lib/Target/VE/VEInstrInfo.td

@@ -83,7 +83,7 @@ def HI32 : SDNodeXForm<imm, [{
 }]>;
 
 def icond2cc : SDNodeXForm<cond, [{
-  VECC::CondCodes cc;
+  VECC::CondCode cc;
   switch (N->get()) {
   default:          llvm_unreachable("Unknown integer condition code!");
   case ISD::SETEQ:  cc = VECC::CC_IEQ; break;
@@ -101,7 +101,7 @@ def icond2cc : SDNodeXForm<cond, [{
 }]>;
 
 def fcond2cc : SDNodeXForm<cond, [{
-  VECC::CondCodes cc;
+  VECC::CondCode cc;
   switch (N->get()) {
   default:          llvm_unreachable("Unknown float condition code!");
   case ISD::SETFALSE: cc = VECC::CC_AF;    break;