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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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- ; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver4 | FileCheck %s --check-prefixes=CHECK,XOP
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+ ; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver2 | FileCheck %s --check-prefixes=CHECK,XOP,XOPAVX1
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+ ; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver4 | FileCheck %s --check-prefixes=CHECK,XOP,XOPAVX2
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; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=skylake-avx512 | FileCheck %s --check-prefixes=CHECK,AVX512
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define <4 x i32 > @rot_v4i32_splat (<4 x i32 > %x ) {
@@ -77,10 +78,20 @@ define <4 x i32> @rot_v4i32_non_splat_2masks(<4 x i32> %x) {
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}
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define <4 x i32 > @rot_v4i32_zero_non_splat (<4 x i32 > %x ) {
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- ; CHECK-LABEL: rot_v4i32_zero_non_splat:
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- ; CHECK: # %bb.0:
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- ; CHECK-NEXT: vbroadcastss %xmm0, %xmm0
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- ; CHECK-NEXT: retq
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+ ; XOPAVX1-LABEL: rot_v4i32_zero_non_splat:
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+ ; XOPAVX1: # %bb.0:
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+ ; XOPAVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0]
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+ ; XOPAVX1-NEXT: retq
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+ ;
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+ ; XOPAVX2-LABEL: rot_v4i32_zero_non_splat:
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+ ; XOPAVX2: # %bb.0:
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+ ; XOPAVX2-NEXT: vbroadcastss %xmm0, %xmm0
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+ ; XOPAVX2-NEXT: retq
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+ ;
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+ ; AVX512-LABEL: rot_v4i32_zero_non_splat:
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+ ; AVX512: # %bb.0:
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+ ; AVX512-NEXT: vbroadcastss %xmm0, %xmm0
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+ ; AVX512-NEXT: retq
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%1 = call <4 x i32 > @llvm.fshl.v4i32 (<4 x i32 > %x , <4 x i32 > %x , <4 x i32 > <i32 0 , i32 1 , i32 2 , i32 3 >)
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%2 = shufflevector <4 x i32 > %1 , <4 x i32 > undef , <4 x i32 > zeroinitializer
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ret <4 x i32 > %2
@@ -97,12 +108,19 @@ define <4 x i32> @rot_v4i32_allsignbits(<4 x i32> %x, <4 x i32> %y) {
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}
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define <4 x i32 > @rot_v4i32_mask_ashr0 (<4 x i32 > %a0 ) {
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- ; XOP-LABEL: rot_v4i32_mask_ashr0:
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- ; XOP: # %bb.0:
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- ; XOP-NEXT: vpsravd {{.*}}(%rip), %xmm0, %xmm0
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- ; XOP-NEXT: vprotd $1, %xmm0, %xmm0
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- ; XOP-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
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- ; XOP-NEXT: retq
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+ ; XOPAVX1-LABEL: rot_v4i32_mask_ashr0:
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+ ; XOPAVX1: # %bb.0:
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+ ; XOPAVX1-NEXT: vpshad {{.*}}(%rip), %xmm0, %xmm0
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+ ; XOPAVX1-NEXT: vprotd $1, %xmm0, %xmm0
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+ ; XOPAVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
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+ ; XOPAVX1-NEXT: retq
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+ ;
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+ ; XOPAVX2-LABEL: rot_v4i32_mask_ashr0:
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+ ; XOPAVX2: # %bb.0:
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+ ; XOPAVX2-NEXT: vpsravd {{.*}}(%rip), %xmm0, %xmm0
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+ ; XOPAVX2-NEXT: vprotd $1, %xmm0, %xmm0
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+ ; XOPAVX2-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
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+ ; XOPAVX2-NEXT: retq
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;
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; AVX512-LABEL: rot_v4i32_mask_ashr0:
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; AVX512: # %bb.0:
@@ -118,13 +136,21 @@ define <4 x i32> @rot_v4i32_mask_ashr0(<4 x i32> %a0) {
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}
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define <4 x i32 > @rot_v4i32_mask_ashr1 (<4 x i32 > %a0 ) {
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- ; XOP-LABEL: rot_v4i32_mask_ashr1:
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- ; XOP: # %bb.0:
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- ; XOP-NEXT: vpsrad $25, %xmm0, %xmm0
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- ; XOP-NEXT: vprotd $1, %xmm0, %xmm0
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- ; XOP-NEXT: vpbroadcastd %xmm0, %xmm0
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- ; XOP-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
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- ; XOP-NEXT: retq
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+ ; XOPAVX1-LABEL: rot_v4i32_mask_ashr1:
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+ ; XOPAVX1: # %bb.0:
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+ ; XOPAVX1-NEXT: vpsrad $25, %xmm0, %xmm0
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+ ; XOPAVX1-NEXT: vprotd $1, %xmm0, %xmm0
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+ ; XOPAVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
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+ ; XOPAVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
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+ ; XOPAVX1-NEXT: retq
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+ ;
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+ ; XOPAVX2-LABEL: rot_v4i32_mask_ashr1:
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+ ; XOPAVX2: # %bb.0:
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+ ; XOPAVX2-NEXT: vpsrad $25, %xmm0, %xmm0
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+ ; XOPAVX2-NEXT: vprotd $1, %xmm0, %xmm0
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+ ; XOPAVX2-NEXT: vpbroadcastd %xmm0, %xmm0
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+ ; XOPAVX2-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
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+ ; XOPAVX2-NEXT: retq
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;
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; AVX512-LABEL: rot_v4i32_mask_ashr1:
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; AVX512: # %bb.0:
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