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Changes commited for Nate Begeman: Use a PowerPC specific prolog epilog inserter to control where spilled callee save regs are placed on the stack. Get rid of implicit return address stack slot, save return address reg (LR) in appropriate slot Improve code generated for functions that don't have calls or access globals Note from Chris: PowerPCPEI will eventually be eliminated, once the functionality is merged into CodeGen/PrologEpilogInserter.cpp llvm-svn: 15536
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8 files changed

+405
-108
lines changed

8 files changed

+405
-108
lines changed

‎llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp

Lines changed: 17 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -646,11 +646,8 @@ void ISel::copyConstantToRegister(MachineBasicBlock *MBB,
646646

647647
/// LoadArgumentsToVirtualRegs - Load all of the arguments to this function from
648648
/// the stack into virtual registers.
649-
///
650-
/// FIXME: When we can calculate which args are coming in via registers
651-
/// source them from there instead.
652649
void ISel::LoadArgumentsToVirtualRegs(Function &Fn) {
653-
unsigned ArgOffset = 20; // FIXME why is this not 24?
650+
unsigned ArgOffset = 24;
654651
unsigned GPR_remaining = 8;
655652
unsigned FPR_remaining = 13;
656653
unsigned GPR_idx = 0, FPR_idx = 0;
@@ -1412,8 +1409,10 @@ void ISel::visitBranchInst(BranchInst &BI) {
14121409
/// <http://developer.apple.com/documentation/DeveloperTools/Conceptual/MachORuntime/2rt_powerpc_abi/chapter_9_section_5.html>
14131410
void ISel::doCall(const ValueRecord &Ret, MachineInstr *CallMI,
14141411
const std::vector<ValueRecord> &Args, bool isVarArg) {
1415-
// Count how many bytes are to be pushed on the stack...
1416-
unsigned NumBytes = 0;
1412+
// Count how many bytes are to be pushed on the stack, including the linkage
1413+
// area, and parameter passing area.
1414+
unsigned NumBytes = 24;
1415+
unsigned ArgOffset = 24;
14171416

14181417
if (!Args.empty()) {
14191418
for (unsigned i = 0, e = Args.size(); i != e; ++i)
@@ -1430,12 +1429,16 @@ void ISel::doCall(const ValueRecord &Ret, MachineInstr *CallMI,
14301429
default: assert(0 && "Unknown class!");
14311430
}
14321431

1432+
// Just to be safe, we'll always reserve the full 32 bytes worth of
1433+
// argument passing space in case any called code gets funky on us.
1434+
if (NumBytes < 24 + 32) NumBytes = 24 + 32;
1435+
14331436
// Adjust the stack pointer for the new arguments...
1434-
BuildMI(BB, PPC32::ADJCALLSTACKDOWN, 1).addSImm(NumBytes);
1437+
// These functions are automatically eliminated by the prolog/epilog pass
1438+
BuildMI(BB, PPC32::ADJCALLSTACKDOWN, 1).addImm(NumBytes);
14351439

14361440
// Arguments go on the stack in reverse order, as specified by the ABI.
14371441
// Offset to the paramater area on the stack is 24.
1438-
unsigned ArgOffset = 24;
14391442
int GPR_remaining = 8, FPR_remaining = 13;
14401443
unsigned GPR_idx = 0, FPR_idx = 0;
14411444
static const unsigned GPR[] = {
@@ -1573,12 +1576,14 @@ void ISel::doCall(const ValueRecord &Ret, MachineInstr *CallMI,
15731576
GPR_idx++;
15741577
}
15751578
} else {
1576-
BuildMI(BB, PPC32::ADJCALLSTACKDOWN, 1).addSImm(0);
1579+
BuildMI(BB, PPC32::ADJCALLSTACKDOWN, 1).addImm(0);
15771580
}
15781581

15791582
BuildMI(BB, PPC32::IMPLICIT_DEF, 0, PPC32::LR);
15801583
BB->push_back(CallMI);
1581-
BuildMI(BB, PPC32::ADJCALLSTACKUP, 1).addSImm(NumBytes);
1584+
1585+
// These functions are automatically eliminated by the prolog/epilog pass
1586+
BuildMI(BB, PPC32::ADJCALLSTACKUP, 1).addImm(NumBytes);
15821587

15831588
// If there is a return value, scavenge the result from the ___location the call
15841589
// leaves it in...
@@ -1592,11 +1597,11 @@ void ISel::doCall(const ValueRecord &Ret, MachineInstr *CallMI,
15921597
// Integral results are in r3
15931598
BuildMI(BB, PPC32::OR, 2, Ret.Reg).addReg(PPC32::R3).addReg(PPC32::R3);
15941599
break;
1595-
case cFP32: // Floating-point return values live in f1
1600+
case cFP32: // Floating-point return values live in f1
15961601
case cFP64:
15971602
BuildMI(BB, PPC32::FMR, 1, Ret.Reg).addReg(PPC32::F1);
15981603
break;
1599-
case cLong: // Long values are in r3 hi:r4 lo
1604+
case cLong: // Long values are in r3:r4
16001605
BuildMI(BB, PPC32::OR, 2, Ret.Reg).addReg(PPC32::R3).addReg(PPC32::R3);
16011606
BuildMI(BB, PPC32::OR, 2, Ret.Reg+1).addReg(PPC32::R4).addReg(PPC32::R4);
16021607
break;

‎llvm/lib/Target/PowerPC/PowerPC.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,7 @@ class TargetMachine;
2626
// passes. For example:
2727
FunctionPass *createPPCSimpleInstructionSelector(TargetMachine &TM);
2828
FunctionPass *createPPCCodePrinterPass(std::ostream &OS, TargetMachine &TM);
29+
FunctionPass *createPowerPCPEI();
2930
FunctionPass *createPPCBranchSelectionPass();
3031
} // end namespace llvm;
3132

‎llvm/lib/Target/PowerPC/PowerPC.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -33,11 +33,11 @@ def PowerPC : Target {
3333
let PointerType = i32;
3434

3535
// According to the Mach-O Runtime ABI, these regs are nonvolatile across
36-
// calls: put LR in here someday when we can Do The Right Thing
36+
// calls
3737
let CalleeSavedRegisters = [R1, R13, R14, R15, R16, R17, R18, R19,
3838
R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, R30, R31, F14, F15,
3939
F16, F17, F18, F19, F20, F21, F22, F23, F24, F25, F26, F27, F28, F29,
40-
F30, F31, CR2, CR3, CR4];
40+
F30, F31, CR2, CR3, CR4, LR];
4141

4242
// Pull in Instruction Info:
4343
let InstructionSet = PowerPCInstrInfo;

‎llvm/lib/Target/PowerPC/PowerPCISelSimple.cpp

Lines changed: 17 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -646,11 +646,8 @@ void ISel::copyConstantToRegister(MachineBasicBlock *MBB,
646646

647647
/// LoadArgumentsToVirtualRegs - Load all of the arguments to this function from
648648
/// the stack into virtual registers.
649-
///
650-
/// FIXME: When we can calculate which args are coming in via registers
651-
/// source them from there instead.
652649
void ISel::LoadArgumentsToVirtualRegs(Function &Fn) {
653-
unsigned ArgOffset = 20; // FIXME why is this not 24?
650+
unsigned ArgOffset = 24;
654651
unsigned GPR_remaining = 8;
655652
unsigned FPR_remaining = 13;
656653
unsigned GPR_idx = 0, FPR_idx = 0;
@@ -1412,8 +1409,10 @@ void ISel::visitBranchInst(BranchInst &BI) {
14121409
/// <http://developer.apple.com/documentation/DeveloperTools/Conceptual/MachORuntime/2rt_powerpc_abi/chapter_9_section_5.html>
14131410
void ISel::doCall(const ValueRecord &Ret, MachineInstr *CallMI,
14141411
const std::vector<ValueRecord> &Args, bool isVarArg) {
1415-
// Count how many bytes are to be pushed on the stack...
1416-
unsigned NumBytes = 0;
1412+
// Count how many bytes are to be pushed on the stack, including the linkage
1413+
// area, and parameter passing area.
1414+
unsigned NumBytes = 24;
1415+
unsigned ArgOffset = 24;
14171416

14181417
if (!Args.empty()) {
14191418
for (unsigned i = 0, e = Args.size(); i != e; ++i)
@@ -1430,12 +1429,16 @@ void ISel::doCall(const ValueRecord &Ret, MachineInstr *CallMI,
14301429
default: assert(0 && "Unknown class!");
14311430
}
14321431

1432+
// Just to be safe, we'll always reserve the full 32 bytes worth of
1433+
// argument passing space in case any called code gets funky on us.
1434+
if (NumBytes < 24 + 32) NumBytes = 24 + 32;
1435+
14331436
// Adjust the stack pointer for the new arguments...
1434-
BuildMI(BB, PPC32::ADJCALLSTACKDOWN, 1).addSImm(NumBytes);
1437+
// These functions are automatically eliminated by the prolog/epilog pass
1438+
BuildMI(BB, PPC32::ADJCALLSTACKDOWN, 1).addImm(NumBytes);
14351439

14361440
// Arguments go on the stack in reverse order, as specified by the ABI.
14371441
// Offset to the paramater area on the stack is 24.
1438-
unsigned ArgOffset = 24;
14391442
int GPR_remaining = 8, FPR_remaining = 13;
14401443
unsigned GPR_idx = 0, FPR_idx = 0;
14411444
static const unsigned GPR[] = {
@@ -1573,12 +1576,14 @@ void ISel::doCall(const ValueRecord &Ret, MachineInstr *CallMI,
15731576
GPR_idx++;
15741577
}
15751578
} else {
1576-
BuildMI(BB, PPC32::ADJCALLSTACKDOWN, 1).addSImm(0);
1579+
BuildMI(BB, PPC32::ADJCALLSTACKDOWN, 1).addImm(0);
15771580
}
15781581

15791582
BuildMI(BB, PPC32::IMPLICIT_DEF, 0, PPC32::LR);
15801583
BB->push_back(CallMI);
1581-
BuildMI(BB, PPC32::ADJCALLSTACKUP, 1).addSImm(NumBytes);
1584+
1585+
// These functions are automatically eliminated by the prolog/epilog pass
1586+
BuildMI(BB, PPC32::ADJCALLSTACKUP, 1).addImm(NumBytes);
15821587

15831588
// If there is a return value, scavenge the result from the ___location the call
15841589
// leaves it in...
@@ -1592,11 +1597,11 @@ void ISel::doCall(const ValueRecord &Ret, MachineInstr *CallMI,
15921597
// Integral results are in r3
15931598
BuildMI(BB, PPC32::OR, 2, Ret.Reg).addReg(PPC32::R3).addReg(PPC32::R3);
15941599
break;
1595-
case cFP32: // Floating-point return values live in f1
1600+
case cFP32: // Floating-point return values live in f1
15961601
case cFP64:
15971602
BuildMI(BB, PPC32::FMR, 1, Ret.Reg).addReg(PPC32::F1);
15981603
break;
1599-
case cLong: // Long values are in r3 hi:r4 lo
1604+
case cLong: // Long values are in r3:r4
16001605
BuildMI(BB, PPC32::OR, 2, Ret.Reg).addReg(PPC32::R3).addReg(PPC32::R3);
16011606
BuildMI(BB, PPC32::OR, 2, Ret.Reg+1).addReg(PPC32::R4).addReg(PPC32::R4);
16021607
break;

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