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[GlobalISel] Extract handleAssignments out of AArch64CallLowering
This function seems target-independent so far: all the target-specific behaviour is isolated in the CCAssignFn and the ValueHandler (which we're also extracting into the generic CallLowering). The intention is to use this in the ARM backend. Differential Revision: https://reviews.llvm.org/D27045 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288658 91177308-0d34-0410-b5e6-96231b3b80d8
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4 files changed

+89
-87
lines changed

4 files changed

+89
-87
lines changed

‎include/llvm/CodeGen/GlobalISel/CallLowering.h

Lines changed: 47 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,7 @@
1616
#define LLVM_CODEGEN_GLOBALISEL_CALLLOWERING_H
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1818
#include "llvm/ADT/SmallVector.h"
19+
#include "llvm/CodeGen/CallingConvLower.h"
1920
#include "llvm/CodeGen/ValueTypes.h"
2021
#include "llvm/IR/Function.h"
2122
#include "llvm/Target/TargetCallingConv.h"
@@ -39,6 +40,45 @@ class CallLowering {
3940
: Reg(Reg), Ty(Ty), Flags(Flags) {}
4041
};
4142

43+
/// Argument handling is mostly uniform between the four places that
44+
/// make these decisions: function formal arguments, call
45+
/// instruction args, call instruction returns and function
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/// returns. However, once a decision has been made on where an
47+
/// arugment should go, exactly what happens can vary slightly. This
48+
/// class abstracts the differences.
49+
struct ValueHandler {
50+
/// Materialize a VReg containing the address of the specified
51+
/// stack-based object. This is either based on a FrameIndex or
52+
/// direct SP manipulation, depending on the context. \p MPO
53+
/// should be initialized to an appropriate description of the
54+
/// address created.
55+
virtual unsigned getStackAddress(uint64_t Size, int64_t Offset,
56+
MachinePointerInfo &MPO) = 0;
57+
58+
/// The specified value has been assigned to a physical register,
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/// handle the appropriate COPY (either to or from) and mark any
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/// relevant uses/defines as needed.
61+
virtual void assignValueToReg(unsigned ValVReg, unsigned PhysReg,
62+
CCValAssign &VA) = 0;
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64+
/// The specified value has been assigned to a stack
65+
/// ___location. Load or store it there, with appropriate extension
66+
/// if necessary.
67+
virtual void assignValueToAddress(unsigned ValVReg, unsigned Addr,
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uint64_t Size, MachinePointerInfo &MPO,
69+
CCValAssign &VA) = 0;
70+
71+
unsigned extendRegister(unsigned ValReg, CCValAssign &VA);
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73+
ValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI)
74+
: MIRBuilder(MIRBuilder), MRI(MRI) {}
75+
76+
virtual ~ValueHandler() {}
77+
78+
MachineIRBuilder &MIRBuilder;
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MachineRegisterInfo &MRI;
80+
};
81+
4282
protected:
4383
/// Getter for generic TargetLowering class.
4484
const TargetLowering *getTLI() const {
@@ -56,6 +96,13 @@ class CallLowering {
5696
void setArgFlags(ArgInfo &Arg, unsigned OpNum, const DataLayout &DL,
5797
const FuncInfoTy &FuncInfo) const;
5898

99+
/// Invoke the \p AssignFn on each of the given \p Args and then use
100+
/// \p Callback to move them to the assigned locations.
101+
///
102+
/// \return True if everything has succeeded, false otherwise.
103+
bool handleAssignments(MachineIRBuilder &MIRBuilder, CCAssignFn *AssignFn,
104+
ArrayRef<ArgInfo> Args, ValueHandler &Callback) const;
105+
59106
public:
60107
CallLowering(const TargetLowering *TLI) : TLI(TLI) {}
61108
virtual ~CallLowering() {}

‎lib/CodeGen/GlobalISel/CallLowering.cpp

Lines changed: 38 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -12,11 +12,11 @@
1212
///
1313
//===----------------------------------------------------------------------===//
1414

15-
1615
#include "llvm/CodeGen/GlobalISel/CallLowering.h"
16+
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
1717
#include "llvm/CodeGen/MachineOperand.h"
18-
#include "llvm/IR/Instructions.h"
1918
#include "llvm/IR/DataLayout.h"
19+
#include "llvm/IR/Instructions.h"
2020
#include "llvm/IR/Module.h"
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#include "llvm/Target/TargetLowering.h"
2222

@@ -100,3 +100,39 @@ template void
100100
CallLowering::setArgFlags<CallInst>(CallLowering::ArgInfo &Arg, unsigned OpIdx,
101101
const DataLayout &DL,
102102
const CallInst &FuncInfo) const;
103+
104+
bool CallLowering::handleAssignments(MachineIRBuilder &MIRBuilder,
105+
CCAssignFn *AssignFn,
106+
ArrayRef<ArgInfo> Args,
107+
ValueHandler &Handler) const {
108+
MachineFunction &MF = MIRBuilder.getMF();
109+
const Function &F = *MF.getFunction();
110+
111+
SmallVector<CCValAssign, 16> ArgLocs;
112+
CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext());
113+
114+
unsigned NumArgs = Args.size();
115+
for (unsigned i = 0; i != NumArgs; ++i) {
116+
MVT CurVT = MVT::getVT(Args[i].Ty);
117+
if (AssignFn(i, CurVT, CurVT, CCValAssign::Full, Args[i].Flags, CCInfo))
118+
return false;
119+
}
120+
121+
for (unsigned i = 0, e = Args.size(); i != e; ++i) {
122+
CCValAssign &VA = ArgLocs[i];
123+
124+
if (VA.isRegLoc())
125+
Handler.assignValueToReg(Args[i].Reg, VA.getLocReg(), VA);
126+
else if (VA.isMemLoc()) {
127+
unsigned Size = VA.getValVT().getSizeInBits() / 8;
128+
unsigned Offset = VA.getLocMemOffset();
129+
MachinePointerInfo MPO;
130+
unsigned StackAddr = Handler.getStackAddress(Size, Offset, MPO);
131+
Handler.assignValueToAddress(Args[i].Reg, StackAddr, Size, MPO, VA);
132+
} else {
133+
// FIXME: Support byvals and other weirdness
134+
return false;
135+
}
136+
}
137+
return true;
138+
}

‎lib/Target/AArch64/AArch64CallLowering.cpp

Lines changed: 4 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -32,44 +32,8 @@ AArch64CallLowering::AArch64CallLowering(const AArch64TargetLowering &TLI)
3232
: CallLowering(&TLI) {
3333
}
3434

35-
bool AArch64CallLowering::handleAssignments(MachineIRBuilder &MIRBuilder,
36-
CCAssignFn *AssignFn,
37-
ArrayRef<ArgInfo> Args,
38-
ValueHandler &Handler) const {
39-
MachineFunction &MF = MIRBuilder.getMF();
40-
const Function &F = *MF.getFunction();
41-
42-
SmallVector<CCValAssign, 16> ArgLocs;
43-
CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext());
44-
45-
unsigned NumArgs = Args.size();
46-
for (unsigned i = 0; i != NumArgs; ++i) {
47-
MVT CurVT = MVT::getVT(Args[i].Ty);
48-
if (AssignFn(i, CurVT, CurVT, CCValAssign::Full, Args[i].Flags, CCInfo))
49-
return false;
50-
}
51-
52-
for (unsigned i = 0, e = Args.size(); i != e; ++i) {
53-
CCValAssign &VA = ArgLocs[i];
54-
55-
if (VA.isRegLoc())
56-
Handler.assignValueToReg(Args[i].Reg, VA.getLocReg(), VA);
57-
else if (VA.isMemLoc()) {
58-
unsigned Size = VA.getValVT().getSizeInBits() / 8;
59-
unsigned Offset = VA.getLocMemOffset();
60-
MachinePointerInfo MPO;
61-
unsigned StackAddr = Handler.getStackAddress(Size, Offset, MPO);
62-
Handler.assignValueToAddress(Args[i].Reg, StackAddr, Size, MPO, VA);
63-
} else {
64-
// FIXME: Support byvals and other weirdness
65-
return false;
66-
}
67-
}
68-
return true;
69-
}
70-
71-
unsigned AArch64CallLowering::ValueHandler::extendRegister(unsigned ValReg,
72-
CCValAssign &VA) {
35+
unsigned CallLowering::ValueHandler::extendRegister(unsigned ValReg,
36+
CCValAssign &VA) {
7337
LLT LocTy{VA.getLocVT()};
7438
switch (VA.getLocInfo()) {
7539
default: break;
@@ -96,7 +60,7 @@ unsigned AArch64CallLowering::ValueHandler::extendRegister(unsigned ValReg,
9660
llvm_unreachable("unable to extend register");
9761
}
9862

99-
struct IncomingArgHandler : public AArch64CallLowering::ValueHandler {
63+
struct IncomingArgHandler : public CallLowering::ValueHandler {
10064
IncomingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI)
10165
: ValueHandler(MIRBuilder, MRI) {}
10266

@@ -152,7 +116,7 @@ struct CallReturnHandler : public IncomingArgHandler {
152116
MachineInstrBuilder MIB;
153117
};
154118

155-
struct OutgoingArgHandler : public AArch64CallLowering::ValueHandler {
119+
struct OutgoingArgHandler : public CallLowering::ValueHandler {
156120
OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI,
157121
MachineInstrBuilder MIB)
158122
: ValueHandler(MIRBuilder, MRI), MIB(MIB) {}

‎lib/Target/AArch64/AArch64CallLowering.h

Lines changed: 0 additions & 45 deletions
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,6 @@
1616
#define LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING
1717

1818
#include "llvm/CodeGen/GlobalISel/CallLowering.h"
19-
#include "llvm/CodeGen/CallingConvLower.h"
2019
#include "llvm/CodeGen/ValueTypes.h"
2120

2221
namespace llvm {
@@ -25,46 +24,6 @@ class AArch64TargetLowering;
2524

2625
class AArch64CallLowering: public CallLowering {
2726
public:
28-
29-
/// Argument handling is mostly uniform between the four places that
30-
/// make these decisions: function formal arguments, call
31-
/// instruction args, call instruction returns and function
32-
/// returns. However, once a decision has been made on where an
33-
/// arugment should go, exactly what happens can vary slightly. This
34-
/// class abstracts the differences.
35-
struct ValueHandler {
36-
/// Materialize a VReg containing the address of the specified
37-
/// stack-based object. This is either based on a FrameIndex or
38-
/// direct SP manipulation, depending on the context. \p MPO
39-
/// should be initialized to an appropriate description of the
40-
/// address created.
41-
virtual unsigned getStackAddress(uint64_t Size, int64_t Offset,
42-
MachinePointerInfo &MPO) = 0;
43-
44-
/// The specified value has been assigned to a physical register,
45-
/// handle the appropriate COPY (either to or from) and mark any
46-
/// relevant uses/defines as needed.
47-
virtual void assignValueToReg(unsigned ValVReg, unsigned PhysReg,
48-
CCValAssign &VA) = 0;
49-
50-
/// The specified value has been assigned to a stack
51-
/// ___location. Load or store it there, with appropriate extension
52-
/// if necessary.
53-
virtual void assignValueToAddress(unsigned ValVReg, unsigned Addr,
54-
uint64_t Size, MachinePointerInfo &MPO,
55-
CCValAssign &VA) = 0;
56-
57-
unsigned extendRegister(unsigned ValReg, CCValAssign &VA);
58-
59-
ValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI)
60-
: MIRBuilder(MIRBuilder), MRI(MRI) {}
61-
62-
virtual ~ValueHandler() {}
63-
64-
MachineIRBuilder &MIRBuilder;
65-
MachineRegisterInfo &MRI;
66-
};
67-
6827
AArch64CallLowering(const AArch64TargetLowering &TLI);
6928

7029
bool lowerReturn(MachineIRBuilder &MIRBuiler, const Value *Val,
@@ -92,10 +51,6 @@ class AArch64CallLowering: public CallLowering {
9251
SmallVectorImpl<ArgInfo> &SplitArgs,
9352
const DataLayout &DL, MachineRegisterInfo &MRI,
9453
SplitArgTy SplitArg) const;
95-
96-
bool handleAssignments(MachineIRBuilder &MIRBuilder, CCAssignFn *AssignFn,
97-
ArrayRef<ArgInfo> Args,
98-
ValueHandler &Callback) const;
9954
};
10055
} // End of namespace llvm;
10156
#endif

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