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[X86][SSE] Add helper function to create UNPCKL/UNPCKH shuffle masks. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288659 91177308-0d34-0410-b5e6-96231b3b80d8
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lib/Target/X86/X86ISelLowering.cpp

Lines changed: 25 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -5054,29 +5054,35 @@ static SDValue getOnesVector(EVT VT, const X86Subtarget &Subtarget,
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return DAG.getBitcast(VT, Vec);
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}
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5057+
/// Generate unpacklo/unpackhi shuffle mask.
5058+
static void createUnpackShuffleMask(MVT VT, SmallVectorImpl<int> &Mask, bool Lo,
5059+
bool Unary) {
5060+
assert(Mask.empty() && "Expected an empty shuffle mask vector");
5061+
int NumElts = VT.getVectorNumElements();
5062+
int NumEltsInLane = 128 / VT.getScalarSizeInBits();
5063+
5064+
for (int i = 0; i < NumElts; ++i) {
5065+
unsigned LaneStart = (i / NumEltsInLane) * NumEltsInLane;
5066+
int Pos = (i % NumEltsInLane) / 2 + LaneStart;
5067+
Pos += (Unary ? 0 : NumElts * (i % 2));
5068+
Pos += (Lo ? 0 : NumEltsInLane / 2);
5069+
Mask.push_back(Pos);
5070+
}
5071+
}
5072+
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/// Returns a vector_shuffle node for an unpackl operation.
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static SDValue getUnpackl(SelectionDAG &DAG, const SDLoc &dl, MVT VT,
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SDValue V1, SDValue V2) {
5060-
assert(VT.is128BitVector() && "Expected a 128-bit vector type");
5061-
unsigned NumElems = VT.getVectorNumElements();
5062-
SmallVector<int, 8> Mask(NumElems);
5063-
for (unsigned i = 0, e = NumElems/2; i != e; ++i) {
5064-
Mask[i * 2] = i;
5065-
Mask[i * 2 + 1] = i + NumElems;
5066-
}
5076+
SmallVector<int, 8> Mask;
5077+
createUnpackShuffleMask(VT, Mask, /* Lo = */ true, /* Unary = */ false);
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return DAG.getVectorShuffle(VT, dl, V1, V2, Mask);
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}
50695080

50705081
/// Returns a vector_shuffle node for an unpackh operation.
50715082
static SDValue getUnpackh(SelectionDAG &DAG, const SDLoc &dl, MVT VT,
50725083
SDValue V1, SDValue V2) {
5073-
assert(VT.is128BitVector() && "Expected a 128-bit vector type");
5074-
unsigned NumElems = VT.getVectorNumElements();
5075-
SmallVector<int, 8> Mask(NumElems);
5076-
for (unsigned i = 0, Half = NumElems/2; i != Half; ++i) {
5077-
Mask[i * 2] = i + Half;
5078-
Mask[i * 2 + 1] = i + NumElems + Half;
5079-
}
5084+
SmallVector<int, 8> Mask;
5085+
createUnpackShuffleMask(VT, Mask, /* Lo = */ false, /* Unary = */ false);
50805086
return DAG.getVectorShuffle(VT, dl, V1, V2, Mask);
50815087
}
50825088

@@ -7854,21 +7860,13 @@ static SDValue lowerVectorShuffleWithPSHUFB(const SDLoc &DL, MVT VT,
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static SDValue lowerVectorShuffleWithUNPCK(const SDLoc &DL, MVT VT,
78557861
ArrayRef<int> Mask, SDValue V1,
78567862
SDValue V2, SelectionDAG &DAG) {
7857-
int NumElts = VT.getVectorNumElements();
7858-
int NumEltsInLane = 128 / VT.getScalarSizeInBits();
7859-
SmallVector<int, 8> Unpckl(NumElts);
7860-
SmallVector<int, 8> Unpckh(NumElts);
7861-
7862-
for (int i = 0; i < NumElts; ++i) {
7863-
unsigned LaneStart = (i / NumEltsInLane) * NumEltsInLane;
7864-
int LoPos = (i % NumEltsInLane) / 2 + LaneStart + NumElts * (i % 2);
7865-
int HiPos = LoPos + NumEltsInLane / 2;
7866-
Unpckl[i] = LoPos;
7867-
Unpckh[i] = HiPos;
7868-
}
7869-
7863+
SmallVector<int, 8> Unpckl;
7864+
createUnpackShuffleMask(VT, Unpckl, /* Lo = */ true, /* Unary = */ false);
78707865
if (isShuffleEquivalent(V1, V2, Mask, Unpckl))
78717866
return DAG.getNode(X86ISD::UNPCKL, DL, VT, V1, V2);
7867+
7868+
SmallVector<int, 8> Unpckh;
7869+
createUnpackShuffleMask(VT, Unpckh, /* Lo = */ false, /* Unary = */ false);
78727870
if (isShuffleEquivalent(V1, V2, Mask, Unpckh))
78737871
return DAG.getNode(X86ISD::UNPCKH, DL, VT, V1, V2);
78747872

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