fixup! [AMDGPU] Ensure non-reserved CSR spilled regs are live-in

macurtis-amd · macurtis-amd · commit 979830ced0d8 · 2025-07-01T09:36:45.000-05:00
diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
@@ -996,7 +996,7 @@ void SIFrameLowering::emitCSRSpillStores(
         }
       };
 
-  for (const auto &Reg : make_first_range(WWMScratchRegs)) {
+  for (const Register &Reg : make_first_range(WWMScratchRegs)) {
     if (!MRI.isReserved(Reg)) {
       MRI.addLiveIn(Reg);
       MBB.addLiveIn(Reg);

Original file line number	Diff line number	Diff line change
`@@ -996,7 +996,7 @@ void SIFrameLowering::emitCSRSpillStores(`
`996`	`996`	`}`
`997`	`997`	`};`
`998`	`998`
`999`		`- for (const auto &Reg : make_first_range(WWMScratchRegs)) {`
	`999`	`+ for (const Register &Reg : make_first_range(WWMScratchRegs)) {`
`1000`	`1000`	`if (!MRI.isReserved(Reg)) {`
`1001`	`1001`	`MRI.addLiveIn(Reg);`
`1002`	`1002`	`MBB.addLiveIn(Reg);`