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[ARM] Remove UnsafeFPMath uses #151275

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4b5111a
propagate fmf in br_cc
paperchalice Jul 31, 2025
cf69f3a
Remove UnsafeFPMath uses in ARM
paperchalice Jul 31, 2025
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8 changes: 4 additions & 4 deletions llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -19279,13 +19279,13 @@ SDValue DAGCombiner::visitBRCOND(SDNode *N) {
// MachineBasicBlock CFG, which is awkward.

// fold a brcond with a setcc condition into a BR_CC node if BR_CC is legal
// on the target.
// on the target, also copy fast math flags.
if (N1.getOpcode() == ISD::SETCC &&
TLI.isOperationLegalOrCustom(ISD::BR_CC,
N1.getOperand(0).getValueType())) {
return DAG.getNode(ISD::BR_CC, SDLoc(N), MVT::Other,
Chain, N1.getOperand(2),
N1.getOperand(0), N1.getOperand(1), N2);
return DAG.getNode(ISD::BR_CC, SDLoc(N), MVT::Other, Chain,
N1.getOperand(2), N1.getOperand(0), N1.getOperand(1), N2,
N1->getFlags());
}

if (N1.hasOneUse()) {
Expand Down
21 changes: 19 additions & 2 deletions llvm/lib/Target/ARM/ARMAsmPrinter.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -629,6 +629,21 @@ static bool checkDenormalAttributeConsistency(const Module &M,
});
}

// Returns true if all functions have different denormal modes.
static bool checkDenormalAttributeInconsistency(const Module &M) {
if (M.functions().empty())
return false;
DenormalMode Value =
parseDenormalFPAttribute(M.functions()
.begin()
->getFnAttribute("denormal-fp-math")
.getValueAsString());
return any_of(M, [&](const Function &F) {
StringRef AttrVal = F.getFnAttribute("denormal-fp-math").getValueAsString();
return parseDenormalFPAttribute(AttrVal) != Value;
});
}

void ARMAsmPrinter::emitAttributes() {
MCTargetStreamer &TS = *OutStreamer->getTargetStreamer();
ARMTargetStreamer &ATS = static_cast<ARMTargetStreamer &>(TS);
Expand Down Expand Up @@ -695,7 +710,9 @@ void ARMAsmPrinter::emitAttributes() {
DenormalMode::getPositiveZero()))
ATS.emitAttribute(ARMBuildAttrs::ABI_FP_denormal,
ARMBuildAttrs::PositiveZero);
else if (!TM.Options.UnsafeFPMath)
else if (checkDenormalAttributeInconsistency(*MMI->getModule()) ||
checkDenormalAttributeConsistency(
*MMI->getModule(), "denormal-fp-math", DenormalMode::getIEEE()))
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How should these tags generate if UnsafeFPMath is replaced by denormal mode? Denormal mode is a per function attribute...

ATS.emitAttribute(ARMBuildAttrs::ABI_FP_denormal,
ARMBuildAttrs::IEEEDenormals);
else {
Expand Down Expand Up @@ -730,7 +747,7 @@ void ARMAsmPrinter::emitAttributes() {
TM.Options.NoTrappingFPMath)
ATS.emitAttribute(ARMBuildAttrs::ABI_FP_exceptions,
ARMBuildAttrs::Not_Allowed);
else if (!TM.Options.UnsafeFPMath) {
else {
ATS.emitAttribute(ARMBuildAttrs::ABI_FP_exceptions, ARMBuildAttrs::Allowed);

// If the user has permitted this code to choose the IEEE 754
Expand Down
8 changes: 4 additions & 4 deletions llvm/lib/Target/ARM/ARMISelLowering.cpp
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Expand Up @@ -5736,7 +5736,7 @@ static void expandf64Toi32(SDValue Op, SelectionDAG &DAG,
llvm_unreachable("Unknown VFP cmp argument!");
}

/// OptimizeVFPBrcond - With -enable-unsafe-fp-math, it's legal to optimize some
/// OptimizeVFPBrcond - With nnan, it's legal to optimize some
/// f32 and even f64 comparisons to integer ones.
SDValue
ARMTargetLowering::OptimizeVFPBrcond(SDValue Op, SelectionDAG &DAG) const {
Expand Down Expand Up @@ -5878,9 +5878,9 @@ SDValue ARMTargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) const {
return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, Chain, Dest, ARMcc, Cmp);
}

if (getTargetMachine().Options.UnsafeFPMath &&
(CC == ISD::SETEQ || CC == ISD::SETOEQ ||
CC == ISD::SETNE || CC == ISD::SETUNE)) {
if (SDNodeFlags Flags = Op->getFlags();
Flags.hasNoNaNs() && (CC == ISD::SETEQ || CC == ISD::SETOEQ ||
CC == ISD::SETNE || CC == ISD::SETUNE)) {
if (SDValue Result = OptimizeVFPBrcond(Op, DAG))
return Result;
}
Expand Down
14 changes: 6 additions & 8 deletions llvm/lib/Target/ARM/ARMSubtarget.cpp
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Expand Up @@ -88,18 +88,16 @@ ARMFrameLowering *ARMSubtarget::initializeFrameLowering(StringRef CPU,
ARMSubtarget::ARMSubtarget(const Triple &TT, const std::string &CPU,
const std::string &FS,
const ARMBaseTargetMachine &TM, bool IsLittle,
bool MinSize)
bool MinSize, DenormalMode DM)
: ARMGenSubtargetInfo(TT, CPU, /*TuneCPU*/ CPU, FS),
UseMulOps(UseFusedMulOps), CPUString(CPU), OptMinSize(MinSize),
IsLittle(IsLittle), TargetTriple(TT), Options(TM.Options), TM(TM),
IsLittle(IsLittle), DM(DM), TargetTriple(TT), Options(TM.Options), TM(TM),
FrameLowering(initializeFrameLowering(CPU, FS)),
// At this point initializeSubtargetDependencies has been called so
// we can query directly.
InstrInfo(isThumb1Only()
? (ARMBaseInstrInfo *)new Thumb1InstrInfo(*this)
: !isThumb()
? (ARMBaseInstrInfo *)new ARMInstrInfo(*this)
: (ARMBaseInstrInfo *)new Thumb2InstrInfo(*this)),
InstrInfo(isThumb1Only() ? (ARMBaseInstrInfo *)new Thumb1InstrInfo(*this)
: !isThumb() ? (ARMBaseInstrInfo *)new ARMInstrInfo(*this)
: (ARMBaseInstrInfo *)new Thumb2InstrInfo(*this)),
TLInfo(TM, *this) {

CallLoweringInfo.reset(new ARMCallLowering(*getTargetLowering()));
Expand Down Expand Up @@ -224,7 +222,7 @@ void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
// NEON f32 ops are non-IEEE 754 compliant. Darwin is ok with it by default.
const FeatureBitset &Bits = getFeatureBits();
if ((Bits[ARM::ProcA5] || Bits[ARM::ProcA8]) && // Where this matters
(Options.UnsafeFPMath || isTargetDarwin()))
(isTargetDarwin() || DM == DenormalMode::getPreserveSign()))
HasNEONForFP = true;

if (isRWPI())
Expand Down
5 changes: 4 additions & 1 deletion llvm/lib/Target/ARM/ARMSubtarget.h
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Expand Up @@ -186,6 +186,9 @@ class ARMSubtarget : public ARMGenSubtargetInfo {
/// IsLittle - The target is Little Endian
bool IsLittle;

/// DM - Denormal mode
DenormalMode DM;

/// TargetTriple - What processor and OS we're targeting.
Triple TargetTriple;

Expand All @@ -206,7 +209,7 @@ class ARMSubtarget : public ARMGenSubtargetInfo {
///
ARMSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS,
const ARMBaseTargetMachine &TM, bool IsLittle,
bool MinSize = false);
bool MinSize = false, DenormalMode DM = DenormalMode::getIEEE());

/// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
/// that still makes it profitable to inline the call.
Expand Down
7 changes: 6 additions & 1 deletion llvm/lib/Target/ARM/ARMTargetMachine.cpp
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Expand Up @@ -285,14 +285,19 @@ ARMBaseTargetMachine::getSubtargetImpl(const Function &F) const {
if (F.hasMinSize())
Key += "+minsize";

DenormalMode DM = parseDenormalFPAttribute(
F.getFnAttribute("denormal-fp-math").getValueAsString());
if (DM != DenormalMode::getIEEE())
Key += "denormal-fp-math=" + DM.str();

auto &I = SubtargetMap[Key];
if (!I) {
// This needs to be done before we create a new subtarget since any
// creation will depend on the TM and the code generation flags on the
// function that reside in TargetOptions.
resetTargetOptions(F);
I = std::make_unique<ARMSubtarget>(TargetTriple, CPU, FS, *this, isLittle,
F.hasMinSize());
F.hasMinSize(), DM);

if (!I->isThumb() && !I->hasARMOps())
F.getContext().emitError("Function '" + F.getName() + "' uses ARM "
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/ARM/fadds.ll
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Expand Up @@ -7,7 +7,7 @@
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - \
; RUN: | FileCheck %s -check-prefix=CORTEXA8

; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math %s -o - \
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --denormal-fp-math=preserve-sign %s -o - \
; RUN: | FileCheck %s -check-prefix=CORTEXA8U

; RUN: llc -mtriple=arm-darwin -mcpu=cortex-a8 %s -o - \
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/ARM/fmuls.ll
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Expand Up @@ -7,7 +7,7 @@
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - \
; RUN: | FileCheck %s -check-prefix=CORTEXA8

; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math %s -o - \
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --denormal-fp-math=preserve-sign %s -o - \
; RUN: | FileCheck %s -check-prefix=CORTEXA8U

; RUN: llc -mtriple=arm-darwin -mcpu=cortex-a8 %s -o - \
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/ARM/fnegs.ll
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Expand Up @@ -10,7 +10,7 @@
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - \
; RUN: | FileCheck %s -check-prefix=CORTEXA8

; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math %s -o - \
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --denormal-fp-math=preserve-sign %s -o - \
; RUN: | FileCheck %s -check-prefix=CORTEXA8U

; RUN: llc -mtriple=arm-darwin -mcpu=cortex-a8 %s -o - \
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/ARM/fnmscs.ll
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Expand Up @@ -13,7 +13,7 @@
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 -regalloc=basic %s -o - \
; RUN: | FileCheck %s -check-prefix=A8

; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math %s -o - \
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math %s -o - \
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@paperchalice paperchalice Jul 31, 2025 •
edited
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"denormal-fp-math=preserve-sign" conflicts with fsub dag combiner, we should have instruction level denormal flags, like fast math flags, see #30633.

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The denormal FP mode and a DAZ fast math flag are orthogonal things

; RUN: | FileCheck %s -check-prefix=A8U

; RUN: llc -mtriple=arm-darwin -mcpu=cortex-a8 %s -o - \
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/ARM/fp_convert.ll
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Expand Up @@ -7,7 +7,7 @@
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - \
; RUN: | FileCheck %s -check-prefix=VFP2

; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math %s -o - \
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --denormal-fp-math=preserve-sign %s -o - \
; RUN: | FileCheck %s -check-prefix=NEON

; RUN: llc -mtriple=arm-darwin -mcpu=cortex-a8 %s -o - \
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/ARM/fpcmp-opt.ll
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@@ -1,4 +1,4 @@
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 -mattr=+vfp2 -enable-unsafe-fp-math %s -o - \
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 -mattr=+vfp2 %s -o - \
; RUN: | FileCheck %s

; rdar://7461510
Expand Down Expand Up @@ -42,7 +42,7 @@ entry:
; CHECK-NOT: vmrs
; CHECK: bne
%0 = load double, ptr %a
%1 = fcmp oeq double %0, 0.000000e+00
%1 = fcmp nnan oeq double %0, 0.000000e+00
br i1 %1, label %bb1, label %bb2

bb1:
Expand All @@ -65,7 +65,7 @@ entry:
; CHECK-NOT: vmrs
; CHECK: bne
%0 = load float, ptr %a
%1 = fcmp oeq float %0, 0.000000e+00
%1 = fcmp nnan oeq float %0, 0.000000e+00
br i1 %1, label %bb1, label %bb2

bb1:
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/ARM/fsubs.ll
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Expand Up @@ -4,7 +4,7 @@
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - \
; RUN: | FileCheck %s -check-prefix=NFP1

; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math %s -o - \
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --denormal-fp-math=preserve-sign %s -o - \
; RUN: | FileCheck %s -check-prefix=NFP1U

; RUN: llc -mtriple=arm-darwin -mcpu=cortex-a8 %s -o - \
Expand Down
10 changes: 5 additions & 5 deletions llvm/test/CodeGen/ARM/neon-spfp.ll
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Expand Up @@ -4,11 +4,11 @@
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a15 | FileCheck %s -check-prefix=CHECK-LINUXA15
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=swift | FileCheck %s -check-prefix=CHECK-LINUXSWIFT

; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a5 --enable-unsafe-fp-math | FileCheck %s -check-prefix=CHECK-UNSAFEA5
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a8 --enable-unsafe-fp-math | FileCheck %s -check-prefix=CHECK-UNSAFEA8
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a9 --enable-unsafe-fp-math | FileCheck %s -check-prefix=CHECK-UNSAFEA9
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a15 --enable-unsafe-fp-math | FileCheck %s -check-prefix=CHECK-UNSAFEA15
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=swift --enable-unsafe-fp-math | FileCheck %s -check-prefix=CHECK-UNSAFESWIFT
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a5 --denormal-fp-math=preserve-sign | FileCheck %s -check-prefix=CHECK-UNSAFEA5
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a8 --denormal-fp-math=preserve-sign | FileCheck %s -check-prefix=CHECK-UNSAFEA8
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a9 --denormal-fp-math=preserve-sign | FileCheck %s -check-prefix=CHECK-UNSAFEA9
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a15 --denormal-fp-math=preserve-sign | FileCheck %s -check-prefix=CHECK-UNSAFEA15
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=swift --denormal-fp-math=preserve-sign | FileCheck %s -check-prefix=CHECK-UNSAFESWIFT

; RUN: llc < %s -mtriple armv7a-none-darwin -mcpu=cortex-a5 | FileCheck %s -check-prefix=CHECK-DARWINA5
; RUN: llc < %s -mtriple armv7a-none-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK-DARWINA8
Expand Down
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