[libclc] Move mem_fence and barrier to clc library #151446
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__clc_mem_fence and __clc_barrier function have two parameters Scope and MemorySemantics, which are defined in SPIR-V spec. The design allows the clc functions to implement SPIR-V ControlBarrier and MemoryBarrier functions in the future. The default memory ordering in clc is set to SequentiallyConsistent, which is also the default and strongest ordering in OpenCL and C++. The default memory scope in clc is set to memory_scope_device for amdgcn and ptx-nvidiacl since __opencl_c_atomic_scope_all_devices feature macro is not defined for these targets. llvm-diff shows no change to amdgcn--amdhsa.bc and nvptx64--nvidiacl.bc.
arsenm
reviewed
Aug 1, 2025
| #define __CLC_MEM_FENCE_CLC_MEM_SCOPE_SEMANTICS_H__ | ||
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| // Scope values are defined in SPIR-V spec. | ||
| typedef enum Scope { |
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Should stick to OpenCL spec and terminology; I thought clang already had predefined enums for both of these
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__clc_mem_fence and __clc_barrier function have two parameters Scope and MemorySemantics, which are defined in SPIR-V spec. The design allows the clc functions to implement SPIR-V ControlBarrier and MemoryBarrier functions in the future.
The default memory ordering in clc is set to SequentiallyConsistent, which is also the default and strongest ordering in OpenCL and C++.
The default memory scope in clc is set to memory_scope_device for amdgcn and ptx-nvidiacl since __opencl_c_atomic_scope_all_devices feature macro is not defined for these targets.
llvm-diff shows no change to amdgcn--amdhsa.bc and nvptx64--nvidiacl.bc.