[LoongArch][NFC] Pre-commit for conditional branch optimization

[heiher]

No description provided.

[llvmbot]

@llvm/pr-subscribers-backend-loongarch

Author: hev (heiher)

Changes

---

Patch is 87.90 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/151788.diff

2 Files Affected:

• (added) llvm/test/CodeGen/LoongArch/bittest.ll (+3366)
• (modified) llvm/test/CodeGen/LoongArch/select-const.ll (+25)

diff --git a/llvm/test/CodeGen/LoongArch/bittest.ll b/llvm/test/CodeGen/LoongArch/bittest.ll
new file mode 100644
index 0000000000000..210e4edbb38ff
--- /dev/null
+++ b/llvm/test/CodeGen/LoongArch/bittest.ll
@@ -0,0 +1,3366 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch32 -mattr=+d < %s | FileCheck %s --check-prefixes=CHECK,LA32
+; RUN: llc --mtriple=loongarch64 -mattr=+d < %s | FileCheck %s --check-prefixes=CHECK,LA64
+
+define signext i32 @bittest_7_i32(i32 signext %a) nounwind {
+; LA32-LABEL: bittest_7_i32:
+; LA32:       # %bb.0:
+; LA32-NEXT:    nor $a0, $a0, $zero
+; LA32-NEXT:    srli.w $a0, $a0, 7
+; LA32-NEXT:    andi $a0, $a0, 1
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bittest_7_i32:
+; LA64:       # %bb.0:
+; LA64-NEXT:    nor $a0, $a0, $zero
+; LA64-NEXT:    bstrpick.d $a0, $a0, 7, 7
+; LA64-NEXT:    ret
+  %shr = lshr i32 %a, 7
+  %not = xor i32 %shr, -1
+  %and = and i32 %not, 1
+  ret i32 %and
+}
+
+define signext i32 @bittest_10_i32(i32 signext %a) nounwind {
+; LA32-LABEL: bittest_10_i32:
+; LA32:       # %bb.0:
+; LA32-NEXT:    nor $a0, $a0, $zero
+; LA32-NEXT:    srli.w $a0, $a0, 10
+; LA32-NEXT:    andi $a0, $a0, 1
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bittest_10_i32:
+; LA64:       # %bb.0:
+; LA64-NEXT:    nor $a0, $a0, $zero
+; LA64-NEXT:    bstrpick.d $a0, $a0, 10, 10
+; LA64-NEXT:    ret
+  %shr = lshr i32 %a, 10
+  %not = xor i32 %shr, -1
+  %and = and i32 %not, 1
+  ret i32 %and
+}
+
+define signext i32 @bittest_11_i32(i32 signext %a) nounwind {
+; LA32-LABEL: bittest_11_i32:
+; LA32:       # %bb.0:
+; LA32-NEXT:    nor $a0, $a0, $zero
+; LA32-NEXT:    srli.w $a0, $a0, 11
+; LA32-NEXT:    andi $a0, $a0, 1
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bittest_11_i32:
+; LA64:       # %bb.0:
+; LA64-NEXT:    nor $a0, $a0, $zero
+; LA64-NEXT:    bstrpick.d $a0, $a0, 11, 11
+; LA64-NEXT:    ret
+  %shr = lshr i32 %a, 11
+  %not = xor i32 %shr, -1
+  %and = and i32 %not, 1
+  ret i32 %and
+}
+
+define signext i32 @bittest_31_i32(i32 signext %a) nounwind {
+; LA32-LABEL: bittest_31_i32:
+; LA32:       # %bb.0:
+; LA32-NEXT:    nor $a0, $a0, $zero
+; LA32-NEXT:    srli.w $a0, $a0, 31
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bittest_31_i32:
+; LA64:       # %bb.0:
+; LA64-NEXT:    nor $a0, $a0, $zero
+; LA64-NEXT:    bstrpick.d $a0, $a0, 31, 31
+; LA64-NEXT:    ret
+  %shr = lshr i32 %a, 31
+  %not = xor i32 %shr, -1
+  %and = and i32 %not, 1
+  ret i32 %and
+}
+
+define i64 @bittest_7_i64(i64 %a) nounwind {
+; LA32-LABEL: bittest_7_i64:
+; LA32:       # %bb.0:
+; LA32-NEXT:    nor $a0, $a0, $zero
+; LA32-NEXT:    srli.w $a0, $a0, 7
+; LA32-NEXT:    andi $a0, $a0, 1
+; LA32-NEXT:    move $a1, $zero
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bittest_7_i64:
+; LA64:       # %bb.0:
+; LA64-NEXT:    nor $a0, $a0, $zero
+; LA64-NEXT:    bstrpick.d $a0, $a0, 7, 7
+; LA64-NEXT:    ret
+  %shr = lshr i64 %a, 7
+  %not = xor i64 %shr, -1
+  %and = and i64 %not, 1
+  ret i64 %and
+}
+
+define i64 @bittest_10_i64(i64 %a) nounwind {
+; LA32-LABEL: bittest_10_i64:
+; LA32:       # %bb.0:
+; LA32-NEXT:    nor $a0, $a0, $zero
+; LA32-NEXT:    srli.w $a0, $a0, 10
+; LA32-NEXT:    andi $a0, $a0, 1
+; LA32-NEXT:    move $a1, $zero
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bittest_10_i64:
+; LA64:       # %bb.0:
+; LA64-NEXT:    nor $a0, $a0, $zero
+; LA64-NEXT:    bstrpick.d $a0, $a0, 10, 10
+; LA64-NEXT:    ret
+  %shr = lshr i64 %a, 10
+  %not = xor i64 %shr, -1
+  %and = and i64 %not, 1
+  ret i64 %and
+}
+
+define i64 @bittest_11_i64(i64 %a) nounwind {
+; LA32-LABEL: bittest_11_i64:
+; LA32:       # %bb.0:
+; LA32-NEXT:    nor $a0, $a0, $zero
+; LA32-NEXT:    srli.w $a0, $a0, 11
+; LA32-NEXT:    andi $a0, $a0, 1
+; LA32-NEXT:    move $a1, $zero
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bittest_11_i64:
+; LA64:       # %bb.0:
+; LA64-NEXT:    nor $a0, $a0, $zero
+; LA64-NEXT:    bstrpick.d $a0, $a0, 11, 11
+; LA64-NEXT:    ret
+  %shr = lshr i64 %a, 11
+  %not = xor i64 %shr, -1
+  %and = and i64 %not, 1
+  ret i64 %and
+}
+
+define i64 @bittest_31_i64(i64 %a) nounwind {
+; LA32-LABEL: bittest_31_i64:
+; LA32:       # %bb.0:
+; LA32-NEXT:    nor $a0, $a0, $zero
+; LA32-NEXT:    srli.w $a0, $a0, 31
+; LA32-NEXT:    move $a1, $zero
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bittest_31_i64:
+; LA64:       # %bb.0:
+; LA64-NEXT:    nor $a0, $a0, $zero
+; LA64-NEXT:    bstrpick.d $a0, $a0, 31, 31
+; LA64-NEXT:    ret
+  %shr = lshr i64 %a, 31
+  %not = xor i64 %shr, -1
+  %and = and i64 %not, 1
+  ret i64 %and
+}
+
+define i64 @bittest_32_i64(i64 %a) nounwind {
+; LA32-LABEL: bittest_32_i64:
+; LA32:       # %bb.0:
+; LA32-NEXT:    ori $a0, $zero, 1
+; LA32-NEXT:    andn $a0, $a0, $a1
+; LA32-NEXT:    move $a1, $zero
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bittest_32_i64:
+; LA64:       # %bb.0:
+; LA64-NEXT:    nor $a0, $a0, $zero
+; LA64-NEXT:    bstrpick.d $a0, $a0, 32, 32
+; LA64-NEXT:    ret
+  %shr = lshr i64 %a, 32
+  %not = xor i64 %shr, -1
+  %and = and i64 %not, 1
+  ret i64 %and
+}
+
+define i64 @bittest_63_i64(i64 %a) nounwind {
+; LA32-LABEL: bittest_63_i64:
+; LA32:       # %bb.0:
+; LA32-NEXT:    nor $a0, $a1, $zero
+; LA32-NEXT:    srli.w $a0, $a0, 31
+; LA32-NEXT:    move $a1, $zero
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bittest_63_i64:
+; LA64:       # %bb.0:
+; LA64-NEXT:    nor $a0, $a0, $zero
+; LA64-NEXT:    srli.d $a0, $a0, 63
+; LA64-NEXT:    ret
+  %shr = lshr i64 %a, 63
+  %not = xor i64 %shr, -1
+  %and = and i64 %not, 1
+  ret i64 %and
+}
+
+define i1 @bittest_constant_by_var_shr_i32(i32 signext %b) nounwind {
+; CHECK-LABEL: bittest_constant_by_var_shr_i32:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    lu12i.w $a1, 301408
+; CHECK-NEXT:    ori $a1, $a1, 722
+; CHECK-NEXT:    srl.w $a0, $a1, $a0
+; CHECK-NEXT:    andi $a0, $a0, 1
+; CHECK-NEXT:    ret
+  %shl = lshr i32 1234567890, %b
+  %and = and i32 %shl, 1
+  %cmp = icmp ne i32 %and, 0
+  ret i1 %cmp
+}
+
+define i1 @bittest_constant_by_var_shl_i32(i32 signext %b) nounwind {
+; CHECK-LABEL: bittest_constant_by_var_shl_i32:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    ori $a1, $zero, 1
+; CHECK-NEXT:    sll.w $a0, $a1, $a0
+; CHECK-NEXT:    lu12i.w $a1, 301408
+; CHECK-NEXT:    ori $a1, $a1, 722
+; CHECK-NEXT:    and $a0, $a0, $a1
+; CHECK-NEXT:    sltu $a0, $zero, $a0
+; CHECK-NEXT:    ret
+  %shl = shl i32 1, %b
+  %and = and i32 %shl, 1234567890
+  %cmp = icmp ne i32 %and, 0
+  ret i1 %cmp
+}
+
+define i1 @bittest_constant_by_var_shr_i64(i64 %b) nounwind {
+; LA32-LABEL: bittest_constant_by_var_shr_i64:
+; LA32:       # %bb.0:
+; LA32-NEXT:    lu12i.w $a1, 301408
+; LA32-NEXT:    ori $a1, $a1, 722
+; LA32-NEXT:    srl.w $a1, $a1, $a0
+; LA32-NEXT:    addi.w $a0, $a0, -32
+; LA32-NEXT:    slti $a0, $a0, 0
+; LA32-NEXT:    and $a0, $a0, $a1
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bittest_constant_by_var_shr_i64:
+; LA64:       # %bb.0:
+; LA64-NEXT:    lu12i.w $a1, 301408
+; LA64-NEXT:    ori $a1, $a1, 722
+; LA64-NEXT:    srl.d $a0, $a1, $a0
+; LA64-NEXT:    andi $a0, $a0, 1
+; LA64-NEXT:    ret
+  %shl = lshr i64 1234567890, %b
+  %and = and i64 %shl, 1
+  %cmp = icmp ne i64 %and, 0
+  ret i1 %cmp
+}
+
+define i1 @bittest_constant_by_var_shl_i64(i64 %b) nounwind {
+; LA32-LABEL: bittest_constant_by_var_shl_i64:
+; LA32:       # %bb.0:
+; LA32-NEXT:    addi.w $a1, $a0, -32
+; LA32-NEXT:    slti $a1, $a1, 0
+; LA32-NEXT:    sub.w $a1, $zero, $a1
+; LA32-NEXT:    ori $a2, $zero, 1
+; LA32-NEXT:    sll.w $a0, $a2, $a0
+; LA32-NEXT:    and $a0, $a1, $a0
+; LA32-NEXT:    lu12i.w $a1, 301408
+; LA32-NEXT:    ori $a1, $a1, 722
+; LA32-NEXT:    and $a0, $a0, $a1
+; LA32-NEXT:    sltu $a0, $zero, $a0
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bittest_constant_by_var_shl_i64:
+; LA64:       # %bb.0:
+; LA64-NEXT:    ori $a1, $zero, 1
+; LA64-NEXT:    sll.d $a0, $a1, $a0
+; LA64-NEXT:    lu12i.w $a1, 301408
+; LA64-NEXT:    ori $a1, $a1, 722
+; LA64-NEXT:    and $a0, $a0, $a1
+; LA64-NEXT:    sltu $a0, $zero, $a0
+; LA64-NEXT:    ret
+  %shl = shl i64 1, %b
+  %and = and i64 %shl, 1234567890
+  %cmp = icmp ne i64 %and, 0
+  ret i1 %cmp
+}
+
+define void @bittest_switch(i32 signext %0) {
+; LA32-LABEL: bittest_switch:
+; LA32:       # %bb.0:
+; LA32-NEXT:    ori $a1, $zero, 31
+; LA32-NEXT:    bltu $a1, $a0, .LBB14_3
+; LA32-NEXT:  # %bb.1:
+; LA32-NEXT:    ori $a1, $zero, 1
+; LA32-NEXT:    sll.w $a0, $a1, $a0
+; LA32-NEXT:    lu12i.w $a1, -524285
+; LA32-NEXT:    ori $a1, $a1, 768
+; LA32-NEXT:    and $a0, $a0, $a1
+; LA32-NEXT:    beq $a0, $zero, .LBB14_3
+; LA32-NEXT:  # %bb.2:
+; LA32-NEXT:    b bar
+; LA32-NEXT:  .LBB14_3:
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bittest_switch:
+; LA64:       # %bb.0:
+; LA64-NEXT:    ori $a1, $zero, 31
+; LA64-NEXT:    bltu $a1, $a0, .LBB14_3
+; LA64-NEXT:  # %bb.1:
+; LA64-NEXT:    ori $a1, $zero, 1
+; LA64-NEXT:    sll.d $a0, $a1, $a0
+; LA64-NEXT:    lu12i.w $a1, -524285
+; LA64-NEXT:    ori $a1, $a1, 768
+; LA64-NEXT:    lu32i.d $a1, 0
+; LA64-NEXT:    and $a0, $a0, $a1
+; LA64-NEXT:    beqz $a0, .LBB14_3
+; LA64-NEXT:  # %bb.2:
+; LA64-NEXT:    pcaddu18i $t8, %call36(bar)
+; LA64-NEXT:    jr $t8
+; LA64-NEXT:  .LBB14_3:
+; LA64-NEXT:    ret
+  switch i32 %0, label %3 [
+    i32 8, label %2
+    i32 9, label %2
+    i32 12, label %2
+    i32 13, label %2
+    i32 31, label %2
+  ]
+
+2:
+  tail call void @bar()
+  br label %3
+
+3:
+  ret void
+}
+
+declare void @bar()
+
+define signext i32 @bit_10_z_select_i32(i32 signext %a, i32 signext %b, i32 signext %c) {
+; LA32-LABEL: bit_10_z_select_i32:
+; LA32:       # %bb.0:
+; LA32-NEXT:    andi $a3, $a0, 1024
+; LA32-NEXT:    move $a0, $a1
+; LA32-NEXT:    beq $a3, $zero, .LBB15_2
+; LA32-NEXT:  # %bb.1:
+; LA32-NEXT:    move $a0, $a2
+; LA32-NEXT:  .LBB15_2:
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bit_10_z_select_i32:
+; LA64:       # %bb.0:
+; LA64-NEXT:    andi $a0, $a0, 1024
+; LA64-NEXT:    sltui $a0, $a0, 1
+; LA64-NEXT:    masknez $a2, $a2, $a0
+; LA64-NEXT:    maskeqz $a0, $a1, $a0
+; LA64-NEXT:    or $a0, $a0, $a2
+; LA64-NEXT:    ret
+  %1 = and i32 %a, 1024
+  %2 = icmp eq i32 %1, 0
+  %3 = select i1 %2, i32 %b, i32 %c
+  ret i32 %3
+}
+
+define signext i32 @bit_10_nz_select_i32(i32 signext %a, i32 signext %b, i32 signext %c) {
+; LA32-LABEL: bit_10_nz_select_i32:
+; LA32:       # %bb.0:
+; LA32-NEXT:    andi $a0, $a0, 1024
+; LA32-NEXT:    srli.w $a3, $a0, 10
+; LA32-NEXT:    move $a0, $a1
+; LA32-NEXT:    bne $a3, $zero, .LBB16_2
+; LA32-NEXT:  # %bb.1:
+; LA32-NEXT:    move $a0, $a2
+; LA32-NEXT:  .LBB16_2:
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bit_10_nz_select_i32:
+; LA64:       # %bb.0:
+; LA64-NEXT:    bstrpick.d $a0, $a0, 10, 10
+; LA64-NEXT:    masknez $a2, $a2, $a0
+; LA64-NEXT:    maskeqz $a0, $a1, $a0
+; LA64-NEXT:    or $a0, $a0, $a2
+; LA64-NEXT:    ret
+  %1 = and i32 %a, 1024
+  %2 = icmp ne i32 %1, 0
+  %3 = select i1 %2, i32 %b, i32 %c
+  ret i32 %3
+}
+
+define signext i32 @bit_11_z_select_i32(i32 signext %a, i32 signext %b, i32 signext %c) {
+; LA32-LABEL: bit_11_z_select_i32:
+; LA32:       # %bb.0:
+; LA32-NEXT:    slli.w $a3, $a0, 20
+; LA32-NEXT:    move $a0, $a1
+; LA32-NEXT:    bgez $a3, .LBB17_2
+; LA32-NEXT:  # %bb.1:
+; LA32-NEXT:    move $a0, $a2
+; LA32-NEXT:  .LBB17_2:
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bit_11_z_select_i32:
+; LA64:       # %bb.0:
+; LA64-NEXT:    andi $a0, $a0, 2048
+; LA64-NEXT:    sltui $a0, $a0, 1
+; LA64-NEXT:    masknez $a2, $a2, $a0
+; LA64-NEXT:    maskeqz $a0, $a1, $a0
+; LA64-NEXT:    or $a0, $a0, $a2
+; LA64-NEXT:    ret
+  %1 = and i32 %a, 2048
+  %2 = icmp eq i32 %1, 0
+  %3 = select i1 %2, i32 %b, i32 %c
+  ret i32 %3
+}
+
+define signext i32 @bit_11_nz_select_i32(i32 signext %a, i32 signext %b, i32 signext %c) {
+; LA32-LABEL: bit_11_nz_select_i32:
+; LA32:       # %bb.0:
+; LA32-NEXT:    andi $a0, $a0, 2048
+; LA32-NEXT:    srli.w $a3, $a0, 11
+; LA32-NEXT:    move $a0, $a1
+; LA32-NEXT:    bne $a3, $zero, .LBB18_2
+; LA32-NEXT:  # %bb.1:
+; LA32-NEXT:    move $a0, $a2
+; LA32-NEXT:  .LBB18_2:
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bit_11_nz_select_i32:
+; LA64:       # %bb.0:
+; LA64-NEXT:    bstrpick.d $a0, $a0, 11, 11
+; LA64-NEXT:    masknez $a2, $a2, $a0
+; LA64-NEXT:    maskeqz $a0, $a1, $a0
+; LA64-NEXT:    or $a0, $a0, $a2
+; LA64-NEXT:    ret
+  %1 = and i32 %a, 2048
+  %2 = icmp ne i32 %1, 0
+  %3 = select i1 %2, i32 %b, i32 %c
+  ret i32 %3
+}
+
+define signext i32 @bit_20_z_select_i32(i32 signext %a, i32 signext %b, i32 signext %c) {
+; LA32-LABEL: bit_20_z_select_i32:
+; LA32:       # %bb.0:
+; LA32-NEXT:    slli.w $a3, $a0, 11
+; LA32-NEXT:    move $a0, $a1
+; LA32-NEXT:    bgez $a3, .LBB19_2
+; LA32-NEXT:  # %bb.1:
+; LA32-NEXT:    move $a0, $a2
+; LA32-NEXT:  .LBB19_2:
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bit_20_z_select_i32:
+; LA64:       # %bb.0:
+; LA64-NEXT:    lu12i.w $a3, 256
+; LA64-NEXT:    and $a0, $a0, $a3
+; LA64-NEXT:    sltui $a0, $a0, 1
+; LA64-NEXT:    masknez $a2, $a2, $a0
+; LA64-NEXT:    maskeqz $a0, $a1, $a0
+; LA64-NEXT:    or $a0, $a0, $a2
+; LA64-NEXT:    ret
+  %1 = and i32 %a, 1048576
+  %2 = icmp eq i32 %1, 0
+  %3 = select i1 %2, i32 %b, i32 %c
+  ret i32 %3
+}
+
+define signext i32 @bit_20_nz_select_i32(i32 signext %a, i32 signext %b, i32 signext %c) {
+; LA32-LABEL: bit_20_nz_select_i32:
+; LA32:       # %bb.0:
+; LA32-NEXT:    lu12i.w $a3, 256
+; LA32-NEXT:    and $a0, $a0, $a3
+; LA32-NEXT:    srli.w $a3, $a0, 20
+; LA32-NEXT:    move $a0, $a1
+; LA32-NEXT:    bne $a3, $zero, .LBB20_2
+; LA32-NEXT:  # %bb.1:
+; LA32-NEXT:    move $a0, $a2
+; LA32-NEXT:  .LBB20_2:
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bit_20_nz_select_i32:
+; LA64:       # %bb.0:
+; LA64-NEXT:    bstrpick.d $a0, $a0, 20, 20
+; LA64-NEXT:    masknez $a2, $a2, $a0
+; LA64-NEXT:    maskeqz $a0, $a1, $a0
+; LA64-NEXT:    or $a0, $a0, $a2
+; LA64-NEXT:    ret
+  %1 = and i32 %a, 1048576
+  %2 = icmp ne i32 %1, 0
+  %3 = select i1 %2, i32 %b, i32 %c
+  ret i32 %3
+}
+
+define signext i32 @bit_31_z_select_i32(i32 signext %a, i32 signext %b, i32 signext %c) {
+; LA32-LABEL: bit_31_z_select_i32:
+; LA32:       # %bb.0:
+; LA32-NEXT:    bgez $a0, .LBB21_2
+; LA32-NEXT:  # %bb.1:
+; LA32-NEXT:    move $a1, $a2
+; LA32-NEXT:  .LBB21_2:
+; LA32-NEXT:    move $a0, $a1
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bit_31_z_select_i32:
+; LA64:       # %bb.0:
+; LA64-NEXT:    bstrins.d $a0, $zero, 30, 0
+; LA64-NEXT:    sltui $a0, $a0, 1
+; LA64-NEXT:    masknez $a2, $a2, $a0
+; LA64-NEXT:    maskeqz $a0, $a1, $a0
+; LA64-NEXT:    or $a0, $a0, $a2
+; LA64-NEXT:    ret
+  %1 = and i32 %a, 2147483648
+  %2 = icmp eq i32 %1, 0
+  %3 = select i1 %2, i32 %b, i32 %c
+  ret i32 %3
+}
+
+define signext i32 @bit_31_nz_select_i32(i32 signext %a, i32 signext %b, i32 signext %c) {
+; LA32-LABEL: bit_31_nz_select_i32:
+; LA32:       # %bb.0:
+; LA32-NEXT:    srli.w $a3, $a0, 31
+; LA32-NEXT:    move $a0, $a1
+; LA32-NEXT:    bne $a3, $zero, .LBB22_2
+; LA32-NEXT:  # %bb.1:
+; LA32-NEXT:    move $a0, $a2
+; LA32-NEXT:  .LBB22_2:
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bit_31_nz_select_i32:
+; LA64:       # %bb.0:
+; LA64-NEXT:    bstrins.d $a0, $zero, 30, 0
+; LA64-NEXT:    sltu $a0, $zero, $a0
+; LA64-NEXT:    masknez $a2, $a2, $a0
+; LA64-NEXT:    maskeqz $a0, $a1, $a0
+; LA64-NEXT:    or $a0, $a0, $a2
+; LA64-NEXT:    ret
+  %1 = and i32 %a, 2147483648
+  %2 = icmp ne i32 %1, 0
+  %3 = select i1 %2, i32 %b, i32 %c
+  ret i32 %3
+}
+
+define i64 @bit_10_z_select_i64(i64 %a, i64 %b, i64 %c) {
+; LA32-LABEL: bit_10_z_select_i64:
+; LA32:       # %bb.0:
+; LA32-NEXT:    andi $a6, $a0, 1024
+; LA32-NEXT:    move $a1, $a3
+; LA32-NEXT:    move $a0, $a2
+; LA32-NEXT:    beq $a6, $zero, .LBB23_2
+; LA32-NEXT:  # %bb.1:
+; LA32-NEXT:    move $a0, $a4
+; LA32-NEXT:    move $a1, $a5
+; LA32-NEXT:  .LBB23_2:
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bit_10_z_select_i64:
+; LA64:       # %bb.0:
+; LA64-NEXT:    andi $a0, $a0, 1024
+; LA64-NEXT:    sltui $a0, $a0, 1
+; LA64-NEXT:    masknez $a2, $a2, $a0
+; LA64-NEXT:    maskeqz $a0, $a1, $a0
+; LA64-NEXT:    or $a0, $a0, $a2
+; LA64-NEXT:    ret
+  %1 = and i64 %a, 1024
+  %2 = icmp eq i64 %1, 0
+  %3 = select i1 %2, i64 %b, i64 %c
+  ret i64 %3
+}
+
+define i64 @bit_10_nz_select_i64(i64 %a, i64 %b, i64 %c) {
+; LA32-LABEL: bit_10_nz_select_i64:
+; LA32:       # %bb.0:
+; LA32-NEXT:    srli.w $a0, $a0, 10
+; LA32-NEXT:    andi $a6, $a0, 1
+; LA32-NEXT:    move $a1, $a3
+; LA32-NEXT:    move $a0, $a2
+; LA32-NEXT:    bne $a6, $zero, .LBB24_2
+; LA32-NEXT:  # %bb.1:
+; LA32-NEXT:    move $a0, $a4
+; LA32-NEXT:    move $a1, $a5
+; LA32-NEXT:  .LBB24_2:
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bit_10_nz_select_i64:
+; LA64:       # %bb.0:
+; LA64-NEXT:    bstrpick.d $a0, $a0, 10, 10
+; LA64-NEXT:    masknez $a2, $a2, $a0
+; LA64-NEXT:    maskeqz $a0, $a1, $a0
+; LA64-NEXT:    or $a0, $a0, $a2
+; LA64-NEXT:    ret
+  %1 = and i64 %a, 1024
+  %2 = icmp ne i64 %1, 0
+  %3 = select i1 %2, i64 %b, i64 %c
+  ret i64 %3
+}
+
+define i64 @bit_11_z_select_i64(i64 %a, i64 %b, i64 %c) {
+; LA32-LABEL: bit_11_z_select_i64:
+; LA32:       # %bb.0:
+; LA32-NEXT:    slli.w $a6, $a0, 20
+; LA32-NEXT:    move $a1, $a3
+; LA32-NEXT:    move $a0, $a2
+; LA32-NEXT:    bgez $a6, .LBB25_2
+; LA32-NEXT:  # %bb.1:
+; LA32-NEXT:    move $a0, $a4
+; LA32-NEXT:    move $a1, $a5
+; LA32-NEXT:  .LBB25_2:
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bit_11_z_select_i64:
+; LA64:       # %bb.0:
+; LA64-NEXT:    andi $a0, $a0, 2048
+; LA64-NEXT:    sltui $a0, $a0, 1
+; LA64-NEXT:    masknez $a2, $a2, $a0
+; LA64-NEXT:    maskeqz $a0, $a1, $a0
+; LA64-NEXT:    or $a0, $a0, $a2
+; LA64-NEXT:    ret
+  %1 = and i64 %a, 2048
+  %2 = icmp eq i64 %1, 0
+  %3 = select i1 %2, i64 %b, i64 %c
+  ret i64 %3
+}
+
+define i64 @bit_11_nz_select_i64(i64 %a, i64 %b, i64 %c) {
+; LA32-LABEL: bit_11_nz_select_i64:
+; LA32:       # %bb.0:
+; LA32-NEXT:    srli.w $a0, $a0, 11
+; LA32-NEXT:    andi $a6, $a0, 1
+; LA32-NEXT:    move $a1, $a3
+; LA32-NEXT:    move $a0, $a2
+; LA32-NEXT:    bne $a6, $zero, .LBB26_2
+; LA32-NEXT:  # %bb.1:
+; LA32-NEXT:    move $a0, $a4
+; LA32-NEXT:    move $a1, $a5
+; LA32-NEXT:  .LBB26_2:
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bit_11_nz_select_i64:
+; LA64:       # %bb.0:
+; LA64-NEXT:    bstrpick.d $a0, $a0, 11, 11
+; LA64-NEXT:    masknez $a2, $a2, $a0
+; LA64-NEXT:    maskeqz $a0, $a1, $a0
+; LA64-NEXT:    or $a0, $a0, $a2
+; LA64-NEXT:    ret
+  %1 = and i64 %a, 2048
+  %2 = icmp ne i64 %1, 0
+  %3 = select i1 %2, i64 %b, i64 %c
+  ret i64 %3
+}
+
+define i64 @bit_20_z_select_i64(i64 %a, i64 %b, i64 %c) {
+; LA32-LABEL: bit_20_z_select_i64:
+; LA32:       # %bb.0:
+; LA32-NEXT:    slli.w $a6, $a0, 11
+; LA32-NEXT:    move $a1, $a3
+; LA32-NEXT:    move $a0, $a2
+; LA32-NEXT:    bgez $a6, .LBB27_2
+; LA32-NEXT:  # %bb.1:
+; LA32-NEXT:    move $a0, $a4
+; LA32-NEXT:    move $a1, $a5
+; LA32-NEXT:  .LBB27_2:
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bit_20_z_select_i64:
+; LA64:       # %bb.0:
+; LA64-NEXT:    lu12i.w $a3, 256
+; LA64-NEXT:    and $a0, $a0, $a3
+; LA64-NEXT:    sltui $a0, $a0, 1
+; LA64-NEXT:    masknez $a2, $a2, $a0
+; LA64-NEXT:    maskeqz $a0, $a1, $a0
+; LA64-NEXT:    or $a0, $a0, $a2
+; LA64-NEXT:    ret
+  %1 = and i64 %a, 1048576
+  %2 = icmp eq i64 %1, 0
+  %3 = select i1 %2, i64 %b, i64 %c
+  ret i64 %3
+}
+
+define i64 @bit_20_nz_select_i64(i64 %a, i64 %b, i64 %c) {
+; LA32-LABEL: bit_20_nz_select_i64:
+; LA32:       # %bb.0:
+; LA32-NEXT:    srli.w $a0, $a0, 20
+; LA32-NEXT:    andi $a6, $a0, 1
+; LA32-NEXT:    move $a1, $a3
+; LA32-NEXT:    move $a0, $a2
+; LA32-NEXT:    bne $a6, $zero, .LBB28_2
+; LA32-NEXT:  # %bb.1:
+; LA32-NEXT:    move $a0, $a4
+; LA32-NEXT:    move $a1, $a5
+; LA32-NEXT:  .LBB28_2:
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bit_20_nz_select_i64:
+; LA64:       # %bb.0:
+; LA64-NEXT:    bstrpick.d $a0, $a0, 20, 20
+; LA64-NEXT:    masknez $a2, $a2, $a0
+; LA64-NEXT:    maskeqz $a0, $a1, $a0
+; LA64-NEXT:    or $a0, $a0, $a2
+; LA64-NEXT:    ret
+  %1 = and i64 %a, 1048576
+  %2 = icmp ne i64 %1, 0
+  %3 = select i1 %2, i64 %b, i64 %c
+  ret i64 %3
+}
+
+define i64 @bit_31_z_select_i64(i64 %a, i64 %b, i64 %c) {
+; LA32-LABEL: bit_31_z_select_i64:
+; LA32:       # %bb.0:
+; LA32-NEXT:    move $a1, $a3
+; LA32-NEXT:    bgez $a0, .LBB29_2
+; LA32-NEXT:  # %bb.1:
+; LA32-NEXT:    move $a2, $a4
+; LA32-NEXT:    move $a1, $a5
+; LA32-NEXT:  .LBB29_2:
+; LA32-NEXT:    move $a0, $a2
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: bit_31_z_select_i64:
+; LA64:       # %bb.0:
+; LA64-NEXT:    lu12i.w $a3, ...
[truncated]