Fix RISC-V Test Failures in ./x test for Multiple Codegen Cases #144567
+12
−19
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This PR resolves several test failures encountered when running
./x test
on the RISC-V architecture. These failures were caused by platform-specific behavior, ABI differences, or codegen inconsistencies unique to RISC-V.The following test cases have been fixed to ensure compatibility with RISC-V:
codegen-llvm/enum/enum-match.rs
codegen-llvm/enum/enum-transparent-extract.rs
codegen-llvm/repeat-operand-zero-len.rs
codegen-llvm/enum/enum-aggregate.rs
codegen-llvm/uninhabited-transparent-return-abi.rs
In addition, this PR adjusts
tests/codegen-llvm/transmute-scalar.rs
to explicitly specify the target architecture:As suggested by @nikic, this test is not target-specific and already uses
minicore
, implying it is meant to run against a stable triple regardless of the host architecture. Explicitly setting the target ensures consistent codegen behavior, particularly when testing on non-x86 platforms such as riscv64.All changes have been tested locally on a RISC-V target and now pass as expected.
Notes:
transmute-scalar.rs
aligns with the intent of [#143915](Fix RISC-V Test Failures in ./x test for Multiple Codegen and Assembly Cases #143915) and prevents architecture-dependent discrepancies during CI or local testing.