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intrinsic-test: Adding x86 behavioural testing. #1894

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This is a redo of PR #1814, since a lot of details have changed with PRs #1863, #1862, #1861, #1852.

r? @folkertdev
cc: @Amanieu

Comment on lines 7 to 8
#[derive(Debug, Clone, PartialEq)]
pub struct X86IntrinsicType(pub IntrinsicType);
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@folkertdev as per our discussion in #1884 (comment), would it make sense to add architecture-specific elements here?

@madhav-madhusoodanan madhav-madhusoodanan force-pushed the intrinsic-test-x86-addition branch from cbe9081 to 246fef9 Compare August 5, 2025 10:09
@madhav-madhusoodanan madhav-madhusoodanan force-pushed the intrinsic-test-x86-addition branch from 41db5a8 to 5fc0f3b Compare August 5, 2025 10:16
Comment on lines +56 to +58
fn build_c_file(&self) -> bool {
let c_target = "aarch64";
let platform_headers = &["arm_neon.h", "arm_acle.h", "arm_fp16.h"];
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is this just a direct copy right now? otherwise why does arm show up here?

Comment on lines +199 to +210
match str::parse::<u32>(etype_processed.as_str()) {
Ok(value) => data.bit_len = Some(value),
Err(_) => {
data.bit_len = match data.kind() {
TypeKind::Char(_) => Some(8),
TypeKind::BFloat => Some(16),
TypeKind::Int(_) => Some(32),
TypeKind::Float => Some(32),
_ => None,
};
}
}
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why are only some type kinds covered here? Maybe this could be a method on TypeKind?

Comment on lines +9 to +29
.add_arch_flags(vec![
"avx",
"avx2",
"avx512f",
"avx512cd",
"avx512dq",
"avx512vl",
"avx512bw",
"avx512bf16",
"avx512bitalg",
"lzcnt",
"popcnt",
"adx",
"aes",
])
.set_compiler(cpp_compiler)
.set_target(&config.target)
.set_opt_level("2")
.set_cxx_toolchain_dir(config.cxx_toolchain_dir.as_deref())
.set_project_root("c_programs")
.add_extra_flags(vec!["-ffp-contract=off", "-Wno-narrowing"]);
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#1896 just merged, so now the vec! calls here can be dropped (just pass an array)

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2 participants