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[LoongArch] Enable vector tests for 32-bit target #152094

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@heiher heiher commented Aug 5, 2025

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llvmbot commented Aug 5, 2025

@llvm/pr-subscribers-backend-loongarch

Author: hev (heiher)

Changes

Patch is 457.09 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/152094.diff

475 Files Affected:

  • (modified) llvm/test/CodeGen/LoongArch/lasx/broadcast-load.ll (+79-22)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/bswap.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/concat-vectors.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ctpop-ctlz.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/fma-v4f64.ll (+1133-555)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/fma-v8f32.ll (+1133-555)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/inline-asm-operand-modifier.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/inline-asm-reg-names.ll (+23-11)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/insert-extract-subvector.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-absd.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-add.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-adda.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-addi-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-addi-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-addi.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-addw.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-and.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-andi-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-andi-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-andi.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-andn.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-avg.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-avgr.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-bitclr-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-bitclr-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-bitrev-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-bitrev-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-bitsel.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-bitseli-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-bitseli-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-bitseli.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-bitset-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-bitset-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-bsll-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-bsll-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-bsll.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-bsrl-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-bsrl-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-bsrl.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-clo.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-clz.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-div.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ext2xv.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-exth.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-extl.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-extrins-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-extrins-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-extrins.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-fadd.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-fclass.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-fcmp.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-fcvt.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-fcvth.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-fcvtl.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-fdiv.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ffint.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-flogb.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-fmadd.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-fmax.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-fmaxa.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-fmin.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-fmina.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-fmsub.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-fmul.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-fnmadd.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-fnmsub.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-frecip.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-frint.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-frsqrt.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-frstp-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-frstp-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-frstp.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-fsqrt.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-fsub.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ftint.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-haddw.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-hsubw.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ilv.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-insgr2vr-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-insgr2vr-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-insgr2vr.ll (+14-6)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-insve0-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-insve0-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-insve0.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ld-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ld-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ldi-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ldi-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ldi.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ldrepl-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ldrepl-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ldrepl.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-madd.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-maddw.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-max-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-max.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-min-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-min.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-mod.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-mskgez.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-mskltz.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-msknz.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-msub.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-muh.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-mul.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-mulw.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-neg.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-nor.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-nori-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-nori-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-nori.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-or.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ori-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ori-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ori.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-orn.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-pack.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-pcnt.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-perm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-permi-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-permi-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-permi.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-pick.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-pickve-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-pickve-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-pickve.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-pickve2gr-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-repl128vei-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-repl128vei-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-repl128vei.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-replve.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-replve0.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-rotr-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-rotr-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-rotr.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-sadd.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-sat-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-sat-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-sat.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-seq-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-seq-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-seq.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-shuf.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-shuf4i-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-shuf4i-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-shuf4i.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-signcov.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-sle-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-sle-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-sle.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-sll-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-sll-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-sllwil-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-sllwil-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-sllwil.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-slt-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-slt-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-slt.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-sra-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-sra-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-sran.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srani-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srani-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srani.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srar-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srar-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srar.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srarn.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srarni-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srarni-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srarni.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srl-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srl-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srln.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srlni-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srlni-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srlni.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srlr-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srlr-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srlr.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srlrn.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srlrni-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srlrni-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-srlrni.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ssran.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ssrani-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ssrani-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ssrani.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ssrarn.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ssrarni-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ssrarni-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ssrarni.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ssrln.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ssrlni-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ssrlni-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ssrlni.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ssrlrn.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ssrlrni-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ssrlrni-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ssrlrni.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-ssub.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-st-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-st-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-stelm-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-stelm-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-stelm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-sub.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-subi-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-subi-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-subi.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-subw.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-xor.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-xori-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-xori-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/intrinsic-xori.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/absd.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/add.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/ashr.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fadd.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fcmp.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fix-xvshuf.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fmul.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fneg.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fptosi.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fptoui.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fsub.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/icmp.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insert-bitcast-element.ll (+23-9)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/lshr.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/sdiv.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shl.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvilv.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvpack.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvpick.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/sitofp.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/sub.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/udiv.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/ir-instruction/uitofp.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/issue107355.ll (+47-18)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/mulh.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/scalar-to-vector.ll (+12-5)
  • (modified) llvm/test/CodeGen/LoongArch/lasx/widen-shuffle-mask.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/broadcast-load.ll (+63-20)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/bswap.ll (+2-1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/ctpop-ctlz.ll (+2-1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/fma-v2f64.ll (+6)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/fma-v4f32.ll (+6)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/fpowi.ll (+146-76)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/inline-asm-operand-modifier.ll (+2-1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/inline-asm-reg-names.ll (+23-11)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-absd.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-add.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-adda.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-addi-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-addi-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-addi.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-addw.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-and.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-andi-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-andi-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-andi.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-andn.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-avg.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-avgr.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-bitclr-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-bitclr-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-bitrev-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-bitrev-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-bitsel.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-bitseli-invalid-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-bitseli-non-imm.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-bitseli.ll (+1)
  • (modified) llvm/test/CodeGen/LoongArch/lsx/intrinsic-bitset-invalid-imm.ll (+1)
diff --git a/llvm/test/CodeGen/LoongArch/lasx/broadcast-load.ll b/llvm/test/CodeGen/LoongArch/lasx/broadcast-load.ll
index 976924bdca686..205e59a18bf9d 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/broadcast-load.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/broadcast-load.ll
@@ -1,16 +1,31 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc --mtriple=loongarch64 -mattr=+lasx < %s | FileCheck %s
+; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA32
+; RUN: llc --mtriple=loongarch64 -mattr=+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA64
 
-; TODO: Load a element and splat it to a vector could be lowerd to xvldrepl
 
-; A load has more than one user shouldn't be lowered to xvldrepl
 define <4 x i64> @should_not_be_optimized(ptr %ptr, ptr %dst) {
-; CHECK-LABEL: should_not_be_optimized:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    ld.d $a0, $a0, 0
-; CHECK-NEXT:    xvreplgr2vr.d $xr0, $a0
-; CHECK-NEXT:    st.d $a0, $a1, 0
-; CHECK-NEXT:    ret
+; LA32-LABEL: should_not_be_optimized:
+; LA32:       # %bb.0:
+; LA32-NEXT:    ld.w $a2, $a0, 0
+; LA32-NEXT:    ld.w $a0, $a0, 4
+; LA32-NEXT:    st.w $a2, $a1, 0
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a2, 0
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a0, 1
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a2, 2
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a0, 3
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a2, 4
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a0, 5
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a2, 6
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a0, 7
+; LA32-NEXT:    st.w $a0, $a1, 4
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: should_not_be_optimized:
+; LA64:       # %bb.0:
+; LA64-NEXT:    ld.d $a0, $a0, 0
+; LA64-NEXT:    xvreplgr2vr.d $xr0, $a0
+; LA64-NEXT:    st.d $a0, $a1, 0
+; LA64-NEXT:    ret
   %tmp = load i64, ptr %ptr
   store i64 %tmp, ptr %dst
   %tmp1 = insertelement <4 x i64> zeroinitializer, i64 %tmp, i32 0
@@ -19,11 +34,25 @@ define <4 x i64> @should_not_be_optimized(ptr %ptr, ptr %dst) {
 }
 
 define <4 x i64> @xvldrepl_d_unaligned_offset(ptr %ptr) {
-; CHECK-LABEL: xvldrepl_d_unaligned_offset:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    addi.d $a0, $a0, 4
-; CHECK-NEXT:    xvldrepl.d $xr0, $a0, 0
-; CHECK-NEXT:    ret
+; LA32-LABEL: xvldrepl_d_unaligned_offset:
+; LA32:       # %bb.0:
+; LA32-NEXT:    ld.w $a1, $a0, 4
+; LA32-NEXT:    ld.w $a0, $a0, 8
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a1, 0
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a0, 1
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a1, 2
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a0, 3
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a1, 4
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a0, 5
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a1, 6
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a0, 7
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: xvldrepl_d_unaligned_offset:
+; LA64:       # %bb.0:
+; LA64-NEXT:    addi.d $a0, $a0, 4
+; LA64-NEXT:    xvldrepl.d $xr0, $a0, 0
+; LA64-NEXT:    ret
   %p = getelementptr i32, ptr %ptr, i32 1
   %tmp = load i64, ptr %p
   %tmp1 = insertelement <4 x i64> zeroinitializer, i64 %tmp, i32 0
@@ -103,10 +132,24 @@ define <8 x i32> @xvldrepl_w_offset(ptr %ptr) {
 
 
 define <4 x i64> @xvldrepl_d(ptr %ptr) {
-; CHECK-LABEL: xvldrepl_d:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    xvldrepl.d $xr0, $a0, 0
-; CHECK-NEXT:    ret
+; LA32-LABEL: xvldrepl_d:
+; LA32:       # %bb.0:
+; LA32-NEXT:    ld.w $a1, $a0, 0
+; LA32-NEXT:    ld.w $a0, $a0, 4
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a1, 0
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a0, 1
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a1, 2
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a0, 3
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a1, 4
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a0, 5
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a1, 6
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a0, 7
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: xvldrepl_d:
+; LA64:       # %bb.0:
+; LA64-NEXT:    xvldrepl.d $xr0, $a0, 0
+; LA64-NEXT:    ret
   %tmp = load i64, ptr %ptr
   %tmp1 = insertelement <4 x i64> zeroinitializer, i64 %tmp, i32 0
   %tmp2 = shufflevector <4 x i64> %tmp1, <4 x i64> poison, <4 x i32> zeroinitializer
@@ -114,10 +157,24 @@ define <4 x i64> @xvldrepl_d(ptr %ptr) {
 }
 
 define <4 x i64> @xvldrepl_d_offset(ptr %ptr) {
-; CHECK-LABEL: xvldrepl_d_offset:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    xvldrepl.d $xr0, $a0, 264
-; CHECK-NEXT:    ret
+; LA32-LABEL: xvldrepl_d_offset:
+; LA32:       # %bb.0:
+; LA32-NEXT:    ld.w $a1, $a0, 264
+; LA32-NEXT:    ld.w $a0, $a0, 268
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a1, 0
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a0, 1
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a1, 2
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a0, 3
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a1, 4
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a0, 5
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a1, 6
+; LA32-NEXT:    xvinsgr2vr.w $xr0, $a0, 7
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: xvldrepl_d_offset:
+; LA64:       # %bb.0:
+; LA64-NEXT:    xvldrepl.d $xr0, $a0, 264
+; LA64-NEXT:    ret
   %p = getelementptr i64, ptr %ptr, i64 33
   %tmp = load i64, ptr %p
   %tmp1 = insertelement <4 x i64> zeroinitializer, i64 %tmp, i32 0
diff --git a/llvm/test/CodeGen/LoongArch/lasx/bswap.ll b/llvm/test/CodeGen/LoongArch/lasx/bswap.ll
index 1b0132d25ed59..a4c9abac7dcc6 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/bswap.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/bswap.ll
@@ -1,4 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s
 ; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
 
 define void @bswap_v16i16(ptr %src, ptr %dst) nounwind {
diff --git a/llvm/test/CodeGen/LoongArch/lasx/concat-vectors.ll b/llvm/test/CodeGen/LoongArch/lasx/concat-vectors.ll
index 231e82a6d53ac..d1868a949a076 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/concat-vectors.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/concat-vectors.ll
@@ -1,4 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s
 ; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
 
 define <32 x i8> @concat_poison_v32i8_1(<16 x i8> %a) {
diff --git a/llvm/test/CodeGen/LoongArch/lasx/ctpop-ctlz.ll b/llvm/test/CodeGen/LoongArch/lasx/ctpop-ctlz.ll
index 7786e399c95f4..ba2118fb94f63 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/ctpop-ctlz.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/ctpop-ctlz.ll
@@ -1,4 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s
 ; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
 
 define void @ctpop_v32i8(ptr %src, ptr %dst) nounwind {
diff --git a/llvm/test/CodeGen/LoongArch/lasx/fma-v4f64.ll b/llvm/test/CodeGen/LoongArch/lasx/fma-v4f64.ll
index 0f3df3d573b65..8e1ba7ea16016 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/fma-v4f64.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/fma-v4f64.ll
@@ -1,40 +1,75 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx --fp-contract=fast < %s \
+; RUN:   | FileCheck %s --check-prefix=LA32-CONTRACT-FAST
+; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx --fp-contract=on < %s \
+; RUN:   | FileCheck %s --check-prefix=LA32-CONTRACT-ON
+; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx --fp-contract=off < %s \
+; RUN:   | FileCheck %s --check-prefix=LA32-CONTRACT-OFF
 ; RUN: llc --mtriple=loongarch64 --mattr=+lasx --fp-contract=fast < %s \
-; RUN:   | FileCheck %s --check-prefix=CONTRACT-FAST
+; RUN:   | FileCheck %s --check-prefix=LA64-CONTRACT-FAST
 ; RUN: llc --mtriple=loongarch64 --mattr=+lasx --fp-contract=on < %s \
-; RUN:   | FileCheck %s --check-prefix=CONTRACT-ON
+; RUN:   | FileCheck %s --check-prefix=LA64-CONTRACT-ON
 ; RUN: llc --mtriple=loongarch64 --mattr=+lasx --fp-contract=off < %s \
-; RUN:   | FileCheck %s --check-prefix=CONTRACT-OFF
+; RUN:   | FileCheck %s --check-prefix=LA64-CONTRACT-OFF
 
 define void @xvfmadd_d(ptr %res, ptr %a0, ptr %a1, ptr %a2) nounwind {
-; CONTRACT-FAST-LABEL: xvfmadd_d:
-; CONTRACT-FAST:       # %bb.0: # %entry
-; CONTRACT-FAST-NEXT:    xvld $xr0, $a1, 0
-; CONTRACT-FAST-NEXT:    xvld $xr1, $a2, 0
-; CONTRACT-FAST-NEXT:    xvld $xr2, $a3, 0
-; CONTRACT-FAST-NEXT:    xvfmadd.d $xr0, $xr0, $xr1, $xr2
-; CONTRACT-FAST-NEXT:    xvst $xr0, $a0, 0
-; CONTRACT-FAST-NEXT:    ret
-;
-; CONTRACT-ON-LABEL: xvfmadd_d:
-; CONTRACT-ON:       # %bb.0: # %entry
-; CONTRACT-ON-NEXT:    xvld $xr0, $a1, 0
-; CONTRACT-ON-NEXT:    xvld $xr1, $a2, 0
-; CONTRACT-ON-NEXT:    xvld $xr2, $a3, 0
-; CONTRACT-ON-NEXT:    xvfmul.d $xr0, $xr0, $xr1
-; CONTRACT-ON-NEXT:    xvfadd.d $xr0, $xr0, $xr2
-; CONTRACT-ON-NEXT:    xvst $xr0, $a0, 0
-; CONTRACT-ON-NEXT:    ret
-;
-; CONTRACT-OFF-LABEL: xvfmadd_d:
-; CONTRACT-OFF:       # %bb.0: # %entry
-; CONTRACT-OFF-NEXT:    xvld $xr0, $a1, 0
-; CONTRACT-OFF-NEXT:    xvld $xr1, $a2, 0
-; CONTRACT-OFF-NEXT:    xvld $xr2, $a3, 0
-; CONTRACT-OFF-NEXT:    xvfmul.d $xr0, $xr0, $xr1
-; CONTRACT-OFF-NEXT:    xvfadd.d $xr0, $xr0, $xr2
-; CONTRACT-OFF-NEXT:    xvst $xr0, $a0, 0
-; CONTRACT-OFF-NEXT:    ret
+; LA32-CONTRACT-FAST-LABEL: xvfmadd_d:
+; LA32-CONTRACT-FAST:       # %bb.0: # %entry
+; LA32-CONTRACT-FAST-NEXT:    xvld $xr0, $a1, 0
+; LA32-CONTRACT-FAST-NEXT:    xvld $xr1, $a2, 0
+; LA32-CONTRACT-FAST-NEXT:    xvld $xr2, $a3, 0
+; LA32-CONTRACT-FAST-NEXT:    xvfmadd.d $xr0, $xr0, $xr1, $xr2
+; LA32-CONTRACT-FAST-NEXT:    xvst $xr0, $a0, 0
+; LA32-CONTRACT-FAST-NEXT:    ret
+;
+; LA32-CONTRACT-ON-LABEL: xvfmadd_d:
+; LA32-CONTRACT-ON:       # %bb.0: # %entry
+; LA32-CONTRACT-ON-NEXT:    xvld $xr0, $a1, 0
+; LA32-CONTRACT-ON-NEXT:    xvld $xr1, $a2, 0
+; LA32-CONTRACT-ON-NEXT:    xvld $xr2, $a3, 0
+; LA32-CONTRACT-ON-NEXT:    xvfmul.d $xr0, $xr0, $xr1
+; LA32-CONTRACT-ON-NEXT:    xvfadd.d $xr0, $xr0, $xr2
+; LA32-CONTRACT-ON-NEXT:    xvst $xr0, $a0, 0
+; LA32-CONTRACT-ON-NEXT:    ret
+;
+; LA32-CONTRACT-OFF-LABEL: xvfmadd_d:
+; LA32-CONTRACT-OFF:       # %bb.0: # %entry
+; LA32-CONTRACT-OFF-NEXT:    xvld $xr0, $a1, 0
+; LA32-CONTRACT-OFF-NEXT:    xvld $xr1, $a2, 0
+; LA32-CONTRACT-OFF-NEXT:    xvld $xr2, $a3, 0
+; LA32-CONTRACT-OFF-NEXT:    xvfmul.d $xr0, $xr0, $xr1
+; LA32-CONTRACT-OFF-NEXT:    xvfadd.d $xr0, $xr0, $xr2
+; LA32-CONTRACT-OFF-NEXT:    xvst $xr0, $a0, 0
+; LA32-CONTRACT-OFF-NEXT:    ret
+;
+; LA64-CONTRACT-FAST-LABEL: xvfmadd_d:
+; LA64-CONTRACT-FAST:       # %bb.0: # %entry
+; LA64-CONTRACT-FAST-NEXT:    xvld $xr0, $a1, 0
+; LA64-CONTRACT-FAST-NEXT:    xvld $xr1, $a2, 0
+; LA64-CONTRACT-FAST-NEXT:    xvld $xr2, $a3, 0
+; LA64-CONTRACT-FAST-NEXT:    xvfmadd.d $xr0, $xr0, $xr1, $xr2
+; LA64-CONTRACT-FAST-NEXT:    xvst $xr0, $a0, 0
+; LA64-CONTRACT-FAST-NEXT:    ret
+;
+; LA64-CONTRACT-ON-LABEL: xvfmadd_d:
+; LA64-CONTRACT-ON:       # %bb.0: # %entry
+; LA64-CONTRACT-ON-NEXT:    xvld $xr0, $a1, 0
+; LA64-CONTRACT-ON-NEXT:    xvld $xr1, $a2, 0
+; LA64-CONTRACT-ON-NEXT:    xvld $xr2, $a3, 0
+; LA64-CONTRACT-ON-NEXT:    xvfmul.d $xr0, $xr0, $xr1
+; LA64-CONTRACT-ON-NEXT:    xvfadd.d $xr0, $xr0, $xr2
+; LA64-CONTRACT-ON-NEXT:    xvst $xr0, $a0, 0
+; LA64-CONTRACT-ON-NEXT:    ret
+;
+; LA64-CONTRACT-OFF-LABEL: xvfmadd_d:
+; LA64-CONTRACT-OFF:       # %bb.0: # %entry
+; LA64-CONTRACT-OFF-NEXT:    xvld $xr0, $a1, 0
+; LA64-CONTRACT-OFF-NEXT:    xvld $xr1, $a2, 0
+; LA64-CONTRACT-OFF-NEXT:    xvld $xr2, $a3, 0
+; LA64-CONTRACT-OFF-NEXT:    xvfmul.d $xr0, $xr0, $xr1
+; LA64-CONTRACT-OFF-NEXT:    xvfadd.d $xr0, $xr0, $xr2
+; LA64-CONTRACT-OFF-NEXT:    xvst $xr0, $a0, 0
+; LA64-CONTRACT-OFF-NEXT:    ret
 entry:
   %v0 = load <4 x double>, ptr %a0
   %v1 = load <4 x double>, ptr %a1
@@ -46,34 +81,63 @@ entry:
 }
 
 define void @xvfmsub_d(ptr %res, ptr %a0, ptr %a1, ptr %a2) nounwind {
-; CONTRACT-FAST-LABEL: xvfmsub_d:
-; CONTRACT-FAST:       # %bb.0: # %entry
-; CONTRACT-FAST-NEXT:    xvld $xr0, $a1, 0
-; CONTRACT-FAST-NEXT:    xvld $xr1, $a2, 0
-; CONTRACT-FAST-NEXT:    xvld $xr2, $a3, 0
-; CONTRACT-FAST-NEXT:    xvfmsub.d $xr0, $xr0, $xr1, $xr2
-; CONTRACT-FAST-NEXT:    xvst $xr0, $a0, 0
-; CONTRACT-FAST-NEXT:    ret
-;
-; CONTRACT-ON-LABEL: xvfmsub_d:
-; CONTRACT-ON:       # %bb.0: # %entry
-; CONTRACT-ON-NEXT:    xvld $xr0, $a1, 0
-; CONTRACT-ON-NEXT:    xvld $xr1, $a2, 0
-; CONTRACT-ON-NEXT:    xvld $xr2, $a3, 0
-; CONTRACT-ON-NEXT:    xvfmul.d $xr0, $xr0, $xr1
-; CONTRACT-ON-NEXT:    xvfsub.d $xr0, $xr0, $xr2
-; CONTRACT-ON-NEXT:    xvst $xr0, $a0, 0
-; CONTRACT-ON-NEXT:    ret
-;
-; CONTRACT-OFF-LABEL: xvfmsub_d:
-; CONTRACT-OFF:       # %bb.0: # %entry
-; CONTRACT-OFF-NEXT:    xvld $xr0, $a1, 0
-; CONTRACT-OFF-NEXT:    xvld $xr1, $a2, 0
-; CONTRACT-OFF-NEXT:    xvld $xr2, $a3, 0
-; CONTRACT-OFF-NEXT:    xvfmul.d $xr0, $xr0, $xr1
-; CONTRACT-OFF-NEXT:    xvfsub.d $xr0, $xr0, $xr2
-; CONTRACT-OFF-NEXT:    xvst $xr0, $a0, 0
-; CONTRACT-OFF-NEXT:    ret
+; LA32-CONTRACT-FAST-LABEL: xvfmsub_d:
+; LA32-CONTRACT-FAST:       # %bb.0: # %entry
+; LA32-CONTRACT-FAST-NEXT:    xvld $xr0, $a1, 0
+; LA32-CONTRACT-FAST-NEXT:    xvld $xr1, $a2, 0
+; LA32-CONTRACT-FAST-NEXT:    xvld $xr2, $a3, 0
+; LA32-CONTRACT-FAST-NEXT:    xvfmsub.d $xr0, $xr0, $xr1, $xr2
+; LA32-CONTRACT-FAST-NEXT:    xvst $xr0, $a0, 0
+; LA32-CONTRACT-FAST-NEXT:    ret
+;
+; LA32-CONTRACT-ON-LABEL: xvfmsub_d:
+; LA32-CONTRACT-ON:       # %bb.0: # %entry
+; LA32-CONTRACT-ON-NEXT:    xvld $xr0, $a1, 0
+; LA32-CONTRACT-ON-NEXT:    xvld $xr1, $a2, 0
+; LA32-CONTRACT-ON-NEXT:    xvld $xr2, $a3, 0
+; LA32-CONTRACT-ON-NEXT:    xvfmul.d $xr0, $xr0, $xr1
+; LA32-CONTRACT-ON-NEXT:    xvfsub.d $xr0, $xr0, $xr2
+; LA32-CONTRACT-ON-NEXT:    xvst $xr0, $a0, 0
+; LA32-CONTRACT-ON-NEXT:    ret
+;
+; LA32-CONTRACT-OFF-LABEL: xvfmsub_d:
+; LA32-CONTRACT-OFF:       # %bb.0: # %entry
+; LA32-CONTRACT-OFF-NEXT:    xvld $xr0, $a1, 0
+; LA32-CONTRACT-OFF-NEXT:    xvld $xr1, $a2, 0
+; LA32-CONTRACT-OFF-NEXT:    xvld $xr2, $a3, 0
+; LA32-CONTRACT-OFF-NEXT:    xvfmul.d $xr0, $xr0, $xr1
+; LA32-CONTRACT-OFF-NEXT:    xvfsub.d $xr0, $xr0, $xr2
+; LA32-CONTRACT-OFF-NEXT:    xvst $xr0, $a0, 0
+; LA32-CONTRACT-OFF-NEXT:    ret
+;
+; LA64-CONTRACT-FAST-LABEL: xvfmsub_d:
+; LA64-CONTRACT-FAST:       # %bb.0: # %entry
+; LA64-CONTRACT-FAST-NEXT:    xvld $xr0, $a1, 0
+; LA64-CONTRACT-FAST-NEXT:    xvld $xr1, $a2, 0
+; LA64-CONTRACT-FAST-NEXT:    xvld $xr2, $a3, 0
+; LA64-CONTRACT-FAST-NEXT:    xvfmsub.d $xr0, $xr0, $xr1, $xr2
+; LA64-CONTRACT-FAST-NEXT:    xvst $xr0, $a0, 0
+; LA64-CONTRACT-FAST-NEXT:    ret
+;
+; LA64-CONTRACT-ON-LABEL: xvfmsub_d:
+; LA64-CONTRACT-ON:       # %bb.0: # %entry
+; LA64-CONTRACT-ON-NEXT:    xvld $xr0, $a1, 0
+; LA64-CONTRACT-ON-NEXT:    xvld $xr1, $a2, 0
+; LA64-CONTRACT-ON-NEXT:    xvld $xr2, $a3, 0
+; LA64-CONTRACT-ON-NEXT:    xvfmul.d $xr0, $xr0, $xr1
+; LA64-CONTRACT-ON-NEXT:    xvfsub.d $xr0, $xr0, $xr2
+; LA64-CONTRACT-ON-NEXT:    xvst $xr0, $a0, 0
+; LA64-CONTRACT-ON-NEXT:    ret
+;
+; LA64-CONTRACT-OFF-LABEL: xvfmsub_d:
+; LA64-CONTRACT-OFF:       # %bb.0: # %entry
+; LA64-CONTRACT-OFF-NEXT:    xvld $xr0, $a1, 0
+; LA64-CONTRACT-OFF-NEXT:    xvld $xr1, $a2, 0
+; LA64-CONTRACT-OFF-NEXT:    xvld $xr2, $a3, 0
+; LA64-CONTRACT-OFF-NEXT:    xvfmul.d $xr0, $xr0, $xr1
+; LA64-CONTRACT-OFF-NEXT:    xvfsub.d $xr0, $xr0, $xr2
+; LA64-CONTRACT-OFF-NEXT:    xvst $xr0, $a0, 0
+; LA64-CONTRACT-OFF-NEXT:    ret
 entry:
   %v0 = load <4 x double>, ptr %a0
   %v1 = load <4 x double>, ptr %a1
@@ -85,36 +149,67 @@ entry:
 }
 
 define void @xvfnmadd_d(ptr %res, ptr %a0, ptr %a1, ptr %a2) nounwind {
-; CONTRACT-FAST-LABEL: xvfnmadd_d:
-; CONTRACT-FAST:       # %bb.0: # %entry
-; CONTRACT-FAST-NEXT:    xvld $xr0, $a1, 0
-; CONTRACT-FAST-NEXT:    xvld $xr1, $a2, 0
-; CONTRACT-FAST-NEXT:    xvld $xr2, $a3, 0
-; CONTRACT-FAST-NEXT:    xvfnmadd.d $xr0, $xr0, $xr1, $xr2
-; CONTRACT-FAST-NEXT:    xvst $xr0, $a0, 0
-; CONTRACT-FAST-NEXT:    ret
-;
-; CONTRACT-ON-LABEL: xvfnmadd_d:
-; CONTRACT-ON:       # %bb.0: # %entry
-; CONTRACT-ON-NEXT:    xvld $xr0, $a1, 0
-; CONTRACT-ON-NEXT:    xvld $xr1, $a2, 0
-; CONTRACT-ON-NEXT:    xvld $xr2, $a3, 0
-; CONTRACT-ON-NEXT:    xvfmul.d $xr0, $xr0, $xr1
-; CONTRACT-ON-NEXT:    xvfadd.d $xr0, $xr0, $xr2
-; CONTRACT-ON-NEXT:    xvbitrevi.d $xr0, $xr0, 63
-; CONTRACT-ON-NEXT:    xvst $xr0, $a0, 0
-; CONTRACT-ON-NEXT:    ret
-;
-; CONTRACT-OFF-LABEL: xvfnmadd_d:
-; CONTRACT-OFF:       # %bb.0: # %entry
-; CONTRACT-OFF-NEXT:    xvld $xr0, $a1, 0
-; CONTRACT-OFF-NEXT:    xvld $xr1, $a2, 0
-; CONTRACT-OFF-NEXT:    xvld $xr2, $a3, 0
-; CONTRACT-OFF-NEXT:    xvfmul.d $xr0, $xr0, $xr1
-; CONTRACT-OFF-NEXT:    xvfadd.d $xr0, $xr0, $xr2
-; CONTRACT-OFF-NEXT:    xvbitrevi.d $xr0, $xr0, 63
-; CONTRACT-OFF-NEXT:    xvst $xr0, $a0, 0
-; CONTRACT-OFF-NEXT:    ret
+; LA32-CONTRACT-FAST-LABEL: xvfnmadd_d:
+; LA32-CONTRACT-FAST:       # %bb.0: # %entry
+; LA32-CONTRACT-FAST-NEXT:    xvld $xr0, $a1, 0
+; LA32-CONTRACT-FAST-NEXT:    xvld $xr1, $a2, 0
+; LA32-CONTRACT-FAST-NEXT:    xvld $xr2, $a3, 0
+; LA32-CONTRACT-FAST-NEXT:    xvfnmadd.d $xr0, $xr0, $xr1, $xr2
+; LA32-CONTRACT-FAST-NEXT:    xvst $xr0, $a0, 0
+; LA32-CONTRACT-FAST-NEXT:    ret
+;
+; LA32-CONTRACT-ON-LABEL: xvfnmadd_d:
+; LA32-CONTRACT-ON:       # %bb.0: # %entry
+; LA32-CONTRACT-ON-NEXT:    xvld $xr0, $a1, 0
+; LA32-CONTRACT-ON-NEXT:    xvld $xr1, $a2, 0
+; LA32-CONTRACT-ON-NEXT:    xvld $xr2, $a3, 0
+; LA32-CONTRACT-ON-NEXT:    xvfmul.d $xr0, $xr0, $xr1
+; LA32-CONTRACT-ON-NEXT:    xvfadd.d $xr0, $xr0, $xr2
+; LA32-CONTRACT-ON-NEXT:    xvbitrevi.d $xr0, $xr0, 63
+; LA32-CONTRACT-ON-NEXT:    xvst $xr0, $a0, 0
+; LA32-CONTRACT-ON-NEXT:    ret
+;
+; LA32-CONTRACT-OFF-LABEL: xvfnmadd_d:
+; LA32-CONTRACT-OFF:       # %bb.0: # %entry
+; LA32-CONTRACT-OFF-NEXT:    xvld $xr0, $a1, 0
+; LA32-CONTRACT-OFF-NEXT:    xvld $xr1, $a2, 0
+; LA32-CONTRACT-OFF-NEXT:    xvld $xr2, $a3, 0
+; LA32-CONTRACT-OFF-NEXT:    xvfmul.d $xr0, $xr0, $xr1
+; LA32-CONTRACT-OFF-NEXT:    xvfadd.d $xr0, $xr0, $xr2
+; LA32-CONTRACT-OFF-NEXT:    xvbitrevi.d $xr0, $xr0, 63
+; LA32-CONTRACT-OFF-NEXT:    xvst $xr0, $a0, 0
+; LA32-CONTRACT-OFF-NEXT:    ret
+;
+; LA64-CONTRACT-FAST-LABEL: xvfnmadd_d:
+; LA64-CONTRACT-FAST:       # %bb.0: # %entry
+; LA64-CONTRACT-FAST-NEXT:    xvld $xr0, $a1, 0
+; LA64-CONTRACT-FAST-NEXT:    xvld $xr1, $a2, 0
+; LA64-CONTRACT-FAST-NEXT:    xvld $xr2, $a3, 0
+; LA64-CONTRACT-FAST-NEXT:    xvfnmadd.d $xr0, $xr0, $xr1, $xr2
+; LA64-CONTRACT-FAST-NEXT:    xvst $xr0, $a0, 0
+; LA64-CONTRACT-FAST-NEXT:    ret
+;
+; LA64-CONTRACT-ON-LABEL: xvfnmadd_d:
+; LA64-CONTRACT-ON:       # %bb.0: # %entry
+; LA64-CONTRACT-ON-NEXT:    xvld $xr0, $a1, 0
+; LA64-CONTRACT-ON-NEXT:    xvld $xr1, $a2, 0
+; LA64-CONTRACT-ON-NEXT:    xvld $xr2, $a3, 0
+; LA64-CONTRACT-ON-NEXT:    xvfmul.d $xr0, $xr0, $xr1
+; LA64-CONTRACT-ON-NEXT:    xvfadd.d $xr0, $xr0, $xr2
+; LA64-CONTRACT-ON-NEXT:    xvbitrevi.d $xr0, $xr0, 63
+; LA64-CONTRACT-ON-NEXT:    xvst $xr0, $a0, 0
+; LA64-CONTRACT-ON-NEXT:    ret
+;
+; LA64-CONTRACT-OFF-LABEL: xvfnmadd_d:
+; LA64-CONTRACT-OFF:       # %bb.0: # %entry
+; LA64-CONTRACT-OFF-NEXT:    xvld $xr0, $a1, 0
+; LA64-CONTRACT-OFF-NEXT:    xvld $xr1, $a2, 0
+; LA64-CONTRACT-OFF-NEXT:    xvld $xr2, $a3, 0
+; LA64-CONTRACT-OFF-NEXT:    xvfmul.d $xr0, $xr0, $xr1
+; LA64-CONTRACT-OFF-NEXT:    xvfadd.d $xr0, $xr0, $xr2
+; LA64-CONTRACT-OFF-NEXT:    xvbitrevi.d $xr0, $xr0, 63
+; LA64-CONTRACT-OFF-NEXT:    xvst $xr0, $a0, 0
+; LA64-CONTRACT-OFF-NEXT:    ret
 entry:
   %v0 = load <4 x double>, ptr %a0
   %v1 = load <4 x double>, ptr %a1
@@ -127,36 +222,67 @@ entry:
 }
 
 define void @xvfnmadd_d_nsz(ptr %res, ptr %a0, ptr %a1, ptr %a2) nounwind {
-; CONTRACT-FAST-LABEL: xvfnmadd_d_nsz:
-; CONTRACT-FAST:       # %bb.0: # %entry
-; CONTRACT-FAST-NEXT:    xvld $xr0, $a1, 0
-; CONTRACT-FAST-NEXT:    xvld $xr1, $a2, 0
-; CONTRACT-FAST-NEXT:    xvld $xr2, $a3, 0
-; CONTRACT-FAST-NEXT:    xvfnmadd.d $xr0, $xr0, $xr1, $xr2
-; CONTRACT-FAST-NEXT:    xvst $xr0, $a0, 0
-; CONTRACT-FAST-NEXT:    ret
-;
-; CONTRACT-ON-LABEL: xvfnmadd_d_nsz:
-; CONTRACT-ON:       # %bb.0: # %entry
-; CONTRACT-ON-NEXT:    xvld $xr0, $a1, 0
-; CONTRACT-ON-NEXT:    xvld $xr1, $a2, 0
-; CONTRACT-ON-NEXT:    xvld $xr2, $a3, 0
-; CONTRACT-ON-NEXT:    xvbitrevi.d $xr0, $xr0, 63
-; CONTRACT-ON-NEXT:    xvfmul.d $xr0, $xr0, $xr1
-; CONTRACT-ON-NEXT:    xvfsub.d $xr0, $xr0, $xr2
-; CONTRACT-ON-NEXT:    xvst $xr0, $a0, 0
-; CON...
[truncated]

@heiher heiher requested a review from tangaac August 5, 2025 11:22
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