Use an ugly name to help catch field projection

crates/core_arch/src/aarch64/neon/mod.rs

@@ -425,7 +425,7 @@ pub fn vmovq_n_f64(value: f64) -> float64x2_t {
 #[cfg_attr(test, assert_instr(nop))]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vget_high_f64(a: float64x2_t) -> float64x1_t {
-    unsafe { float64x1_t([simd_extract!(a, 1)]) }
+    unsafe { float64x1_t::from_array([simd_extract!(a, 1)]) }
 }
 
 /// Duplicate vector element to vector or scalar
@@ -443,7 +443,7 @@ pub fn vget_high_p64(a: poly64x2_t) -> poly64x1_t {
 #[cfg_attr(test, assert_instr(nop))]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vget_low_f64(a: float64x2_t) -> float64x1_t {
-    unsafe { float64x1_t([simd_extract!(a, 0)]) }
+    unsafe { float64x1_t::from_array([simd_extract!(a, 0)]) }
 }
 
 /// Duplicate vector element to vector or scalar

crates/core_arch/src/macros.rs

@@ -103,16 +103,28 @@ macro_rules! types {
                 unsafe { simd_shuffle!(one, one, [0; $len]) }
             }
 
+            /// Constructs a vector from an array of the same elements and length
+            ///
+            /// For now you don't *have* to use this to construct one of these
+            /// (depending on the visibility you put on the field) but it's encouraged
+            /// in case direct construction also gets banned.
+            #[inline]
+            $v const fn from_array(array: [$elem_type; $len]) -> Self {
+                // Projecting into SIMD is banned, but this is technically an
+                // `Rvalue::Aggregate`, which is not a projection.
+                $name { do_not_field_project: array }
+            }
+
             /// Returns an array reference containing the entire SIMD vector.
+            #[inline]
             $v const fn as_array(&self) -> &[$elem_type; $len] {
                 // SAFETY: this type is just an overaligned `[T; N]` with
                 // potential padding at the end, so pointer casting to a
                 // `&[T; N]` is safe.
                 //
-                // NOTE: This deliberately doesn't just use `&self.0` because it may soon be banned
+                // NOTE: This deliberately doesn't just use `&self.0` it's banned
                 // see https://github.com/rust-lang/compiler-team/issues/838
                 unsafe { &*(self as *const Self as *const [$elem_type; $len]) }
-
             }
 
             /// Returns a mutable array reference containing the entire SIMD vector.

crates/core_arch/src/x86/avx.rs

@@ -2391,7 +2391,7 @@ pub fn _mm256_set_epi64x(a: i64, b: i64, c: i64, d: i64) -> __m256i {
 // This intrinsic has no corresponding instruction.
 #[stable(feature = "simd_x86", since = "1.27.0")]
 pub fn _mm256_setr_pd(a: f64, b: f64, c: f64, d: f64) -> __m256d {
-    __m256d([a, b, c, d])
+    __m256d::from_array([a, b, c, d])
 }
 
 /// Sets packed single-precision (32-bit) floating-point elements in returned
@@ -2403,7 +2403,7 @@ pub fn _mm256_setr_pd(a: f64, b: f64, c: f64, d: f64) -> __m256d {
 // This intrinsic has no corresponding instruction.
 #[stable(feature = "simd_x86", since = "1.27.0")]
 pub fn _mm256_setr_ps(a: f32, b: f32, c: f32, d: f32, e: f32, f: f32, g: f32, h: f32) -> __m256 {
-    __m256([a, b, c, d, e, f, g, h])
+    __m256::from_array([a, b, c, d, e, f, g, h])
 }
 
 /// Sets packed 8-bit integers in returned vector with the supplied values in

crates/core_arch/src/x86/avx512bf16.rs

@@ -1834,7 +1834,7 @@ mod tests {
 
     #[simd_test(enable = "avx512bf16")]
     unsafe fn test_mm512_cvtpbh_ps() {
-        let a = __m256bh([
+        let a = __m256bh::from_array([
             BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
             BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
         ]);
@@ -1847,7 +1847,7 @@ mod tests {
 
     #[simd_test(enable = "avx512bf16")]
     unsafe fn test_mm512_mask_cvtpbh_ps() {
-        let a = __m256bh([
+        let a = __m256bh::from_array([
             BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
             BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
         ]);
@@ -1864,7 +1864,7 @@ mod tests {
 
     #[simd_test(enable = "avx512bf16")]
     unsafe fn test_mm512_maskz_cvtpbh_ps() {
-        let a = __m256bh([
+        let a = __m256bh::from_array([
             BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
             BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
         ]);
@@ -1878,7 +1878,7 @@ mod tests {
 
     #[simd_test(enable = "avx512bf16,avx512vl")]
     unsafe fn test_mm256_cvtpbh_ps() {
-        let a = __m128bh([
+        let a = __m128bh::from_array([
             BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
         ]);
         let r = _mm256_cvtpbh_ps(a);
@@ -1888,7 +1888,7 @@ mod tests {
 
     #[simd_test(enable = "avx512bf16,avx512vl")]
     unsafe fn test_mm256_mask_cvtpbh_ps() {
-        let a = __m128bh([
+        let a = __m128bh::from_array([
             BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
         ]);
         let src = _mm256_setr_ps(9., 10., 11., 12., 13., 14., 15., 16.);
@@ -1900,7 +1900,7 @@ mod tests {
 
     #[simd_test(enable = "avx512bf16,avx512vl")]
     unsafe fn test_mm256_maskz_cvtpbh_ps() {
-        let a = __m128bh([
+        let a = __m128bh::from_array([
             BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
         ]);
         let k = 0b1010_1010;
@@ -1911,15 +1911,15 @@ mod tests {
 
     #[simd_test(enable = "avx512bf16,avx512vl")]
     unsafe fn test_mm_cvtpbh_ps() {
-        let a = __m128bh([BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, 0, 0, 0, 0]);
+        let a = __m128bh::from_array([BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, 0, 0, 0, 0]);
         let r = _mm_cvtpbh_ps(a);
         let e = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
         assert_eq_m128(r, e);
     }
 
     #[simd_test(enable = "avx512bf16,avx512vl")]
     unsafe fn test_mm_mask_cvtpbh_ps() {
-        let a = __m128bh([BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, 0, 0, 0, 0]);
+        let a = __m128bh::from_array([BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, 0, 0, 0, 0]);
         let src = _mm_setr_ps(9., 10., 11., 12.);
         let k = 0b1010;
         let r = _mm_mask_cvtpbh_ps(src, k, a);
@@ -1929,7 +1929,7 @@ mod tests {
 
     #[simd_test(enable = "avx512bf16,avx512vl")]
     unsafe fn test_mm_maskz_cvtpbh_ps() {
-        let a = __m128bh([BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, 0, 0, 0, 0]);
+        let a = __m128bh::from_array([BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, 0, 0, 0, 0]);
         let k = 0b1010;
         let r = _mm_maskz_cvtpbh_ps(k, a);
         let e = _mm_setr_ps(0., 2., 0., 4.);
@@ -1953,7 +1953,7 @@ mod tests {
     #[simd_test(enable = "avx512bf16,avx512vl")]
     unsafe fn test_mm_mask_cvtneps_pbh() {
         let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
-        let src = __m128bh([5, 6, 7, 8, !0, !0, !0, !0]);
+        let src = __m128bh::from_array([5, 6, 7, 8, !0, !0, !0, !0]);
         let k = 0b1010;
         let r: u16x4 = transmute_copy(&_mm_mask_cvtneps_pbh(src, k, a));
         let e = u16x4::new(5, BF16_TWO, 7, BF16_FOUR);

crates/core_arch/src/x86/avx512fp16.rs

@@ -19,7 +19,7 @@ pub fn _mm_set_ph(
     e1: f16,
     e0: f16,
 ) -> __m128h {
-    __m128h([e0, e1, e2, e3, e4, e5, e6, e7])
+    __m128h::from_array([e0, e1, e2, e3, e4, e5, e6, e7])
 }
 
 /// Set packed half-precision (16-bit) floating-point elements in dst with the supplied values.
@@ -46,7 +46,7 @@ pub fn _mm256_set_ph(
     e1: f16,
     e0: f16,
 ) -> __m256h {
-    __m256h([
+    __m256h::from_array([
         e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15,
     ])
 }
@@ -91,7 +91,7 @@ pub fn _mm512_set_ph(
     e1: f16,
     e0: f16,
 ) -> __m512h {
-    __m512h([
+    __m512h::from_array([
         e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15, e16, e17, e18, e19,
         e20, e21, e22, e23, e24, e25, e26, e27, e28, e29, e30, e31,
     ])
@@ -105,7 +105,7 @@ pub fn _mm512_set_ph(
 #[target_feature(enable = "avx512fp16")]
 #[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
 pub fn _mm_set_sh(a: f16) -> __m128h {
-    __m128h([a, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0])
+    __m128h::from_array([a, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0])
 }
 
 /// Broadcast the half-precision (16-bit) floating-point value a to all elements of dst.
@@ -154,7 +154,7 @@ pub fn _mm_setr_ph(
     e6: f16,
     e7: f16,
 ) -> __m128h {
-    __m128h([e0, e1, e2, e3, e4, e5, e6, e7])
+    __m128h::from_array([e0, e1, e2, e3, e4, e5, e6, e7])
 }
 
 /// Set packed half-precision (16-bit) floating-point elements in dst with the supplied values in reverse order.
@@ -181,7 +181,7 @@ pub fn _mm256_setr_ph(
     e14: f16,
     e15: f16,
 ) -> __m256h {
-    __m256h([
+    __m256h::from_array([
         e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15,
     ])
 }
@@ -226,7 +226,7 @@ pub fn _mm512_setr_ph(
     e30: f16,
     e31: f16,
 ) -> __m512h {
-    __m512h([
+    __m512h::from_array([
         e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15, e16, e17, e18, e19,
         e20, e21, e22, e23, e24, e25, e26, e27, e28, e29, e30, e31,
     ])

crates/core_arch/src/x86/avxneconvert.rs

@@ -275,7 +275,7 @@ mod tests {
 
     #[simd_test(enable = "avxneconvert")]
     unsafe fn test_mm_cvtneebf16_ps() {
-        let a = __m128bh([
+        let a = __m128bh::from_array([
             BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
         ]);
         let r = _mm_cvtneebf16_ps(addr_of!(a));
@@ -285,7 +285,7 @@ mod tests {
 
     #[simd_test(enable = "avxneconvert")]
     unsafe fn test_mm256_cvtneebf16_ps() {
-        let a = __m256bh([
+        let a = __m256bh::from_array([
             BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
             BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
         ]);
@@ -296,15 +296,15 @@ mod tests {
 
     #[simd_test(enable = "avxneconvert")]
     unsafe fn test_mm_cvtneeph_ps() {
-        let a = __m128h([1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0]);
+        let a = __m128h::from_array([1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0]);
         let r = _mm_cvtneeph_ps(addr_of!(a));
         let e = _mm_setr_ps(1., 3., 5., 7.);
         assert_eq_m128(r, e);
     }
 
     #[simd_test(enable = "avxneconvert")]
     unsafe fn test_mm256_cvtneeph_ps() {
-        let a = __m256h([
+        let a = __m256h::from_array([
             1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0,
         ]);
         let r = _mm256_cvtneeph_ps(addr_of!(a));
@@ -314,7 +314,7 @@ mod tests {
 
     #[simd_test(enable = "avxneconvert")]
     unsafe fn test_mm_cvtneobf16_ps() {
-        let a = __m128bh([
+        let a = __m128bh::from_array([
             BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
         ]);
         let r = _mm_cvtneobf16_ps(addr_of!(a));
@@ -324,7 +324,7 @@ mod tests {
 
     #[simd_test(enable = "avxneconvert")]
     unsafe fn test_mm256_cvtneobf16_ps() {
-        let a = __m256bh([
+        let a = __m256bh::from_array([
             BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
             BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
         ]);
@@ -335,15 +335,15 @@ mod tests {
 
     #[simd_test(enable = "avxneconvert")]
     unsafe fn test_mm_cvtneoph_ps() {
-        let a = __m128h([1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0]);
+        let a = __m128h::from_array([1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0]);
         let r = _mm_cvtneoph_ps(addr_of!(a));
         let e = _mm_setr_ps(2., 4., 6., 8.);
         assert_eq_m128(r, e);
     }
 
     #[simd_test(enable = "avxneconvert")]
     unsafe fn test_mm256_cvtneoph_ps() {
-        let a = __m256h([
+        let a = __m256h::from_array([
             1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0,
         ]);
         let r = _mm256_cvtneoph_ps(addr_of!(a));

crates/core_arch/src/x86/sse.rs

@@ -905,7 +905,7 @@ pub fn _mm_cvt_si2ss(a: __m128, b: i32) -> __m128 {
 #[cfg_attr(test, assert_instr(movss))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
 pub fn _mm_set_ss(a: f32) -> __m128 {
-    __m128([a, 0.0, 0.0, 0.0])
+    __m128::from_array([a, 0.0, 0.0, 0.0])
 }
 
 /// Construct a `__m128` with all element set to `a`.
@@ -916,7 +916,7 @@ pub fn _mm_set_ss(a: f32) -> __m128 {
 #[cfg_attr(test, assert_instr(shufps))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
 pub fn _mm_set1_ps(a: f32) -> __m128 {
-    __m128([a, a, a, a])
+    __m128::from_array([a, a, a, a])
 }
 
 /// Alias for [`_mm_set1_ps`](fn._mm_set1_ps.html)
@@ -954,7 +954,7 @@ pub fn _mm_set_ps1(a: f32) -> __m128 {
 #[cfg_attr(test, assert_instr(unpcklps))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
 pub fn _mm_set_ps(a: f32, b: f32, c: f32, d: f32) -> __m128 {
-    __m128([d, c, b, a])
+    __m128::from_array([d, c, b, a])
 }
 
 /// Construct a `__m128` from four floating point values lowest to highest.
@@ -980,7 +980,7 @@ pub fn _mm_set_ps(a: f32, b: f32, c: f32, d: f32) -> __m128 {
 )]
 #[stable(feature = "simd_x86", since = "1.27.0")]
 pub fn _mm_setr_ps(a: f32, b: f32, c: f32, d: f32) -> __m128 {
-    __m128([a, b, c, d])
+    __m128::from_array([a, b, c, d])
 }
 
 /// Construct a `__m128` with all elements initialized to zero.
@@ -1116,7 +1116,7 @@ pub fn _mm_movemask_ps(a: __m128) -> i32 {
 #[cfg_attr(test, assert_instr(movss))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
 pub unsafe fn _mm_load_ss(p: *const f32) -> __m128 {
-    __m128([*p, 0.0, 0.0, 0.0])
+    __m128::from_array([*p, 0.0, 0.0, 0.0])
 }
 
 /// Construct a `__m128` by duplicating the value read from `p` into all
@@ -1132,7 +1132,7 @@ pub unsafe fn _mm_load_ss(p: *const f32) -> __m128 {
 #[stable(feature = "simd_x86", since = "1.27.0")]
 pub unsafe fn _mm_load1_ps(p: *const f32) -> __m128 {
     let a = *p;
-    __m128([a, a, a, a])
+    __m128::from_array([a, a, a, a])
 }
 
 /// Alias for [`_mm_load1_ps`](fn._mm_load1_ps.html)

crates/core_arch/src/x86/sse2.rs

@@ -2497,7 +2497,7 @@ pub fn _mm_set_pd1(a: f64) -> __m128d {
 #[target_feature(enable = "sse2")]
 #[stable(feature = "simd_x86", since = "1.27.0")]
 pub fn _mm_set_pd(a: f64, b: f64) -> __m128d {
-    __m128d([b, a])
+    __m128d::from_array([b, a])
 }
 
 /// Sets packed double-precision (64-bit) floating-point elements in the return